Cirronet Inc.

David G Ratzel

A digitally implemented timing recovery circuit for recovering a clock signal from an input bit stream. The recovery circuit comprising an edge detector for detecting a transition from '0' to '1' or &#x201c;1&#x201d; to &#x201c;0&#x201d; in the input bit stream, a phase counter having a plurality of registers indicative of the phase counter transition state, and a loop counter having a plurality of registers indicative of the loop counter transition state. When the phase counter reaches a particular transition state, a recovered clock pulse is enabled. The phase counter is preferably non-linear to optimize the circuit.

Compact digital timing recovery circuits, devices, systems and processes

A method and apparatus for a wireless communication network. The network utilizing time-division-multiple-access (TDMA) and being configured in a star layout having a base station and at least one remote station. A packet frame having a header, a trailer and a packet is transmitted and received throughout the communication network. The packet is defined to support a registration mechanism for controlling access of remote stations into and out of the network and supporting retransmission of defective or lost packets.

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Decatur, GA, United States of America

David G Ratzel