Arrowhead Center, Inc.

University of Notre Dame Du Lac

David G Mitchell

Homayoon Hatami

Thomas Fuja

Daniel Costello

Yanfang Liu

A modified version of the min-sum algorithm ('MSA') which can lower the error floor performance of quantized LDPC decoders. A threshold attenuated min-sum algorithm (“TAMSA”) and/or threshold offset min-sum algorithm (“TOMSA”), which selectively attenuates or offsets a check node log-likelihood ratio (“LLR”) if the check node receives any variable node LLR with magnitude below a predetermined threshold, while allowing a check node LLR to reach the maximum quantizer level if all the variable node LLRs received by the check node have magnitude greater than the threshold. Embodiments of the present invention can provide desirable results even without knowledge of the location, type, or multiplicity of such objects and can be implemented with only a minor modification to existing decoder hardware.

Threshold-based min-sum algorithm to lower the error floors of quantized low-density parity-check decoders

A hardware efficient implementation of a threshold modified attenuated min-sum algorithm (TAMSA') and a threshold modified offset min-sum algorithm ('TOMSA') that improve the performance of a low density parity-check ('LDPC&#x201d;) decoder by reducing the bit error rate (&#x201c;BER&#x201d;) compared to the conventional attenuated min-sum algorithm (&#x201c;AMSA&#x201d;), offset min-sum algorithm (&#x201c;OMSA&#x201d;), and the min-sum algorithm (&#x201c;MSA&#x201d;). Embodiments of the present invention preferably use circuit optimization techniques, including a parallel computing structure and lookup tables, and a field-programmable gate array (&#x201c;FPGA&#x201d;) or application specific integrated circuit (&#x201c;ASIC&#x201d;) implementation.

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Las Cruces, NM, United States of America

David G Mitchell