Agere Systems Inc.

Avago Technologies General IP (singapore) Pte. Ltd.

Lsi Corporation

David Fitzgerald

Jason P Brenden

Jeffrey A Gleason

Ross Wilson

Michael Straub

Scott O'Brien

David W Kelly

Scott M O'Brien

Stephen Carl Kuehne

Jaydip Bhaumik

James Patrick Howley

Harley Burger

Ronen Malka

Sally A Doherty

Gregory P Micko

Jonathan P Comeau

Barrett L Connolly

Neil Petrie

Stephen Kuehne

An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, a number of leads connected to the array of magnetoresistive read heads, and number of bias circuits connected to the array of read heads by the leads. The bias circuits can be configured to independently bias each of the array of read heads with the array of read heads connected in series or in parallel.

Magnetoresistive reader for two-dimensional magnetic recording

An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals.

Preamplifier common-mode noise rejection for two-dimensional magnetic recording

Various embodiments of the present invention provide systems and methods for determining contact with a storage medium. As an example, a data storage system is disclosed that includes: a head assembly and a data processing circuit. The head includes a head disk interface sensor operable to provide a contact signal indicating contact between the head and a storage medium disposed in relation to the head. The data processing circuit is operable to process the contact signal to yield an indication of a contact between the storage medium and the head.

Systems and methods for detecting head contact

A recording system employing a magneto-resistive (MR) element senses a resistance value of the MR element and generates one or more MR resistance (MRR) signal values based on the sensed MR element resistance value. The MRR signal values might be, for example, current or voltage values proportional or inversely proportional to the MR element resistance value. The MRR signal values might be employed to control one or more of: i) a unity gain bandwidth of a bias loop for the MR element, ii) an MR read head preamplifier low corner frequency, and iii) a slew rate across the MR element.

Magneto-resistive head resistance sensor

A method and apparatus for determining a voltage, such as a bias voltage, supplied by an integrated circuit. A nominal terminating resistor is connected across a first and a second input/output pads from which the voltage is supplied. The voltage is measured across third and fourth pads connected, respectively, to the first and second pads. In an alternative embodiment the functionality of the third and the fourth pads is multiplexed between chip operational circuitry unrelated to the voltage to be measured and a connection to the first and second pads for measuring the voltage.

Apparatus and method for performing a four-point voltage measurement for an integrated circuit

A method of testing a semiconductor circuit including a pair of contact pads, a biasing circuit for applying a voltage to the pair of contact pads, and a sensing circuit for providing a signal indicative of the voltage applied across the contact pads. The method includes determining a voltage gain and voltage offset of the sensing circuit while the biasing circuit is disabled. The method also includes enabling the biasing circuit to produce a voltage across the contact pads and determining, from the resulting output voltage produced by the sensing circuit, an actual output voltage produced by the biasing circuit at the contact pads based on the determined voltage gain and voltage offset of the sensing circuit.

Semiconductor testing

A preamplifier system is provided for connection through an interconnect to a read head. The interconnect has a characteristic impedance associated therewith. The preamplifier system includes an amplifier circuit having an input for connection to the interconnect. The amplifier circuit amplifies an input signal carried from the read head through the interconnect, yielding an amplified input output signal. A feedback resistance is connected between the amplified output signal and the input of the amplifier circuit. The feedback resistance has a value selected to provide an effective input impedance of the preamplifier system to match the characteristic impedance of the interconnect.

Negative feedback impedance matched preamplifier

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Inver Grove Heights, MN, United States of America

David Fitzgerald