Clear Logic, Inc.

David E Schmulian

Alan H Huggins

John A MacPherson

William L Devanney

Ron Thomas

Methods of designing integrated circuit gate arrays include the step of generating a netlist for a gate array integrated circuit having at least first logic and signal resources therein, directly from bitstream data which characterizes a programmable logic device having a first operational functionality and the first logic and signal resources as well. The generating step is also followed by the step of using the netlist to configure the first logic and signal resources within the gate array integrated circuit to provide the first functionality. A preferred integrated circuit design system is also provided and includes a programmable logic device having pre-programmed logic and signal resources therein and a gate array device having base logic and signal resources therein which are equivalent to the unprogrammed logic and signal resources of the programmable logic device. A computer-based apparatus is also provided for decoding a bitstream that characterizes the programmable logic device having a first operational functionality when programmed, into a netlist that designates electrical connections in the gate array device when wired to have the first operational functionality, and to provide a method for generating scan-based test vectors to verify the first functionality. Accordingly, when switching from a functional programmable logic device (PLD) implementation to a gate array implementation, it is unnecessary to start the design process over from scratch by performing logic synthesis, place and route and other front end design operations associated with conventional gate array design techniques.

Designing integrated circuit gate arrays using programmable logic device bitstreams

A radiant-energy configurable fuse structure and array are provided in which the fuse body of the fuse is wider than the fuse connection terminals. The fuse body can be circular or polygonal to capture more of the radiant energy from a targeting beam, which reduces the energy required to blow the fuse. As a result, unrelated circuit elements and patterned lines can be placed closer together in a laser fuse array, thereby increasing the packing density of such arrays.

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San Jose, CA, United States of America

David E Schmulian