Irvine Sensors Corporation

Aprolase Development Co., LLC

Pfg IP LLC

Isc8 Inc.

David E Ludwig

James W Justice

Christian Krutzik

John Kennedy

Medhat Azzazy

W Eric Boyd

James S Yamaguchi

Christ H Saunders

Virgilio Villacorta

Raphael R Some

John J Stuart

Alan C Rogers

Stewart Clark

Omar Asadi

Medhet Azzazy

Eric Weaver

Fredrik Knutson

William Kleinhans

Mannchuoy Yam

Tina Liu

A LIDAR system that can accommodate both a clear atmosphere and be adaptable to environments in which smoke, dust or other particulates (i.e., a degraded environment) exist in the atmosphere around the target is described. The system operates in two fields of regard: clear view mode (wide field of regard) and a degraded view mode (narrow field of regard). The wide field of regard allows the output laser energy to be concentrated over a large number of detector pixels and thus resulting in high scene scan rate. The narrow field of regard allows concentrating the laser output energy on fewer pixels to compensate for the loss of laser energy due to atmospheric degradation. The combination of the ROIC and LIDAR modes of operation result in a system that is capable of operation under clear and degraded environments.

LIDAR device and method for clear and degraded environmental viewing conditions

An invention is disclosed for a real time video analytic processor that embodies algorithms and processing architectures that process a wide variety of sensor images in a fashion that emulates how the human visual path processes and interprets image content. spatial, temporal, and color content of images are analyzed and the salient features of the images determined. These salient features are then compared to the salient features of objects of user interest in order to detect, track, classify, and characterize the activities of the objects. Objects or activities of interest are annotated in the image streams and alerts of critical events are provided to users. Instantiation of the cognitive processing can be accomplished on multi-FPGA and multi-GPU processing hardwares.

Methods and devices for cognitive-based image data analytics in real time

A multilayer electronic imaging module and sensor system incorporating a micro-lens layer for imaging and collimating a received image from a field of regard, a photocathode layer for detecting photons from the micro-lens layer and generating an electron output, a micro-channel plate layer for receiving the output electrons emitted from the photocathode in response to the photon input and amplifying same and stacked readout circuitry for processing the electron output of the micro-channel plate. The sensor system of the invention may be provided in the form of a Cassegrain telescope assembly and includes electromagnetic imaging and scanning means and beam-splitting means for directed predetermined ranges of the received image to one or more photo-detector elements which may be in the form of the micro-channel imaging module of the invention.

Sensor system comprising stacked micro-channel plate detector

Stacked micro-channel plate assembly comprising a micro-lens

A preprocessed semiconductor substrate such as a wafer is provided with a metal etch mask which defines singulation channels on the substrate surface. An isotropic etch process is used to define a singulation channel with a first depth extending into the semiconductor substrate material. A second anisotropic etch process is used to increase the depth of the singulation channel while providing substantially vertical singulation channel sidewalls. The singulation channel can be extended through the depth of the substrate or, in an alternative embodiment, a predetermined portion of the inactive surface of the substrate removed to expose the singulation channels. In this manner, semiconductor die can be precisely singulated from a wafer while maintaining vertical die sidewalls.

Method for precision integrated circuit die singulation using differential etch rates

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source such as a laser is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO shift register range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A Ttrigger signal defines the reflection time represented at each bin location by resetting appropriate circuitry to begin processing. A reference insert circuit inserts data into the FIFO registers at a preselected location to provide a reference point at which all FIFO shift register data may be aligned to accommodate for timing differences between layers and channels. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry such as a field programmable gate array to create a synchronized 3-D point cloud for creating a 3-D target image.

Three-dimensional ladar module with alignment reference insert circuitry

A phase-sensing and scanning time-of-flight LADAR method and device are disclosed that take advantage of an atmospheric absorption bands within the solar IR spectrum. In the phase-sensing LADAR embodiment, an object is illuminated with electromagnetic energy such as a laser beam having a wavelength substantially equal to a predetermined atmospheric absorption band such as 1.39 microns. The transmitted laser beam is modulated at a predetermined frequency and has a first phase. The phase of the reflected and returned laser beam is altered proportional to the distance of the object and has a second phase. The first phase of the transmitted signal and the second phase of the received signal are compared and used to determine the distance of the object from the device. The system may comprise a modified laser that is tuned to operate in an atmospheric absorption band. A method to identify range ambiguity is disclosed by periodically altering the modulation frequency from a first modulation frequency to a second modulation frequency. In the scanning LADAR embodiment, an object is scanned or illuminated with electromagnetic energy having a wavelength substantially equal to a predetermined atmospheric absorption band at a first time and detects the reflection of the beam at a second time. The difference in time from the transmission of the scanning beam and the detection of the reflection of the beam from the object is used to calculate the range of the object.

Phase sensing and scanning time of flight LADAR using atmospheric absorption bands

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A reference insert circuit inserts data into the FIFO registers at a preselected location to provide a reference point at which all FIFO shift register data may be aligned to accommodate for timing differences between layers and channels. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry such as a field programmable gate array to create a synchronized 3-D point cloud for creating a 3-D target image.

Three-dimensional LADAR module with alignment reference insert circuitry comprising high density interconnect structure

A readout circuit which may be in the form of a readout integrated circuit or ROIC is disclosed for use in an AM chirp LADAR system having a photodetector coupled to a passive electronic filter. The filter output is coupled to a capacitive-coupled transimpedance amplifier with an output coupled to an analog storage register. The analog storage register output is coupled to a sample-and-hold circuit which in turn is coupled to an analog to digital converter circuit.  In the stacked configuration, each IC operates independently and outputs its signals on a unique output line. The stacked ICs operate under the same set of control vectors as the individual ICs comprising the stack.

AM chirp LADAR readout circuit and module

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array though collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A Ttrigger signal defines the reflection time represented by each bin location by resetting appropriate circuitry to begin processing. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry to create a 3-D point cloud for creating a 3-D target image.

Three-dimensional imaging processing module incorporating stacked layers containing microelectronic circuits

An electronic package is disclosed in which a plurality of stacked 'same function' IC chips are designed to be used in lieu of a single IC chip, and to fit into a host computer system, in such a way that the system is 'unaware' that substitution has been made. Memory packages are of primary interest, but other packages are also feasible, such as packages of FPGA chips. In order to 'translate' signals between the host system and the stacked IC chips, it is necessary to include suitable interface circuitry between the host system and the stacked chips. Specific examples are disclosed of a 4 MEG SRAM package containing 4 stacked IC chips each supplying a 1 MEG memory, and of 64 MEG DRAM packages containing 4 stacked IC chips each supplying a 16 MEG memory. The interface circuitry can be provided by a single special purpose IC chip included in the stack, referred to as a VIC chip, which chip provides both buffering and decoding circuitry. Additionally, the VIC chip should provide power supply buffering. And, if it has sufficient real estate, such performance enhancing functions as error correction, memory cache, and synchronized memory may be included in the VIC chip circuitry.

Growing community of inventors

Irvine, CA, United States of America

David E Ludwig