International Business Machines Corporation

Other

David E Finlay

Stephen Dale Hanna

David C Stevenson

Jesus C Lopez

John Thomas Varga

Kent S Norgren

Phillip Keith Hoskins

Frankie Sherwood Shook

Terence Travis

Wayne E Robbins

Lisa L Fischer

Ruben Dominguez, Jr

Donald W Zegafuse, Jr, Deceased

Thomas S Mereness

Disclosed is a method, system, and logic for processing pixel data. A first and second logic units each receive line work data and control data for pixels on a sheet from at least one object. The control data for one pixel indicates whether to use the line work data for the pixel or contone data for the pixel. Multiple objects may provide line work data and control data for a same pixel. The first and second logic units output control data indicating to use contone data or line work data for the pixel. A third logic unit receives the line work and control data outputted from the first and second logic units. The third logic unit then outputs control data indicating to use the contone data or line work data for the pixel.

Method, system, and logic for selecting line work and control data for a pixel from multiple objects of line work data provided for the pixel

Pipelined image data transfer which tessellates and quads the data while transferring. The output data from the transfer can be selectively in quad or linear format. Such tessellating and formatting is performed in-line using alternate buffers for pipelining so that there is effectively no delay for performing the operations. The operations are performed by unique input and output buffer and image storage addressing.

Tessellating and quadding pels during image transfer

A character generator with multidirectional scan and variable line and character (or symbol) size capability is disclosed. Universality is implemented by producing a serial binary stream which can be used to print or display in any of eight combinations of scan direction and progression, that is, for scan direction left to right, or vice versa, progressing up or down, or scan direction top or bottom or vice versa, progressing left or right. In formatting the serial binary stream, a font is accessed (for basic symbol definition), which selectively provides for orthogonal scan of the symbol definitions. Variable line size is implemented by terminating a symbol row (or line) based on a predetermined size criteria regardless of the comparable font dimension and 'filling' up to the line size to the extent the corresponding font dimension is less than the predetermined size criteria. Variable character (or symbol) size is implemented by independently multiplying the effect of a symbol definition by selected (integral) factors, in orthogonal directions. The general architecture includes a font table (for symbol definition), an address/escape (A/E) table, defining symbol size for comparison with line size parameters, a character position escape (CPE) table to define a leading character or symbol on each line and a page buffer (PB) memory defining the characters (symbols) in the document and their relationship with other characters (symbols). Access to the CPE table allows access to the PB, from there to the A/E table and from there to the font allows extraction of selected and appropriate portions of the symbol definition to make up the binary system.

Multidirectional scan and print capability

A character generator with multidirectional scan and variable line and character (or symbol) size capability. Universality is implemented by producing a serial binary stram which can be used to print or display in any of eight combinations of scan direction and progression, that is, for scan direction left to right, or vice versa, progressing up or down, or scan direction top to bottom or vice versa, progressing left or right. In formatting the serial binary stream, a font is accessed (for basic symbol definition), which selectively provides for orthogonal scans of the symbol definitions. Variable line size is implemented by terminating a symbol row (or line) based on a predetermined size criteria regardless of the comparable font dimension and 'filling' up to the line size to the extent the corresponding font dimension is less than the predetermined size criteria. Variable character (or symbol) size is implemented by independently multiplying the effect of a symbol definition by selected (integral) factors, in orthogonal directions. The general architecture includes a font table (for symbol definition), an address/escape (A/E) table, defining symbol size for comparison with line size parameters, a character position escape (CPE) table to define a leading character or symbol on each line and a page buffer (PB) memory defining the characters (symbols) in the document and their relationship with other characters (symbols). Access to the CPE table allows access to the PB, from there to the A/E table and from there to the font allows extraction of selected and appropriate portions of the symbol definition to make up the binary system.

The invention provides a printer with a capability of printing in any one of a plurality of rotations. Component image data is stored in a library. The component image data is subdivided into data sets or quads. The size of a quad is selected so that it can be readily rotated with simple hardware. As the data sets are written to a buffer, they are rotated, and the locations in the buffer at which the different data sets are written depends on the selected rotation, to provide for data rotation 'on the fly'.

Method and apparatus for improved printing in a selected orientation

A common memory interfacing circuit and method for coupling a memory to either a synchronous bus or an asynchronous bus. Synchronizing means are provided for synchronizing memory request signals with a local clock when the interfacing circuit is coupled to an asynchronous bus. The interface circuit responds to signals from the memory when internal memory operation has been completed and generates an acknowledge signal to send to the requesting bus. To simplify the common interface circuit, a synchronous protocol for information exchange between system components is made similar to an asynchronous protocol.

Memory controller with synchronous or asynchronous interface

A copy production machine controlled by a programmed computer in which the computer control programs include synchronous and asynchronous portions. The asynchronous portions are repetitively executed in loop form for checking operating components and servicing operator control panels. The synchronous portions are executed in timed relation to the operation of the machine. The execution of the programs is coordinated via a set of memory registers accessible by the computer during execution of both program portions.

Programmed copier control

Multi-processor programmable controller including a random access memory and a non-volatile memory for storing signals relating to a plurality of programs executable in the controller. One processor does text processing and system control functions. A second processor operates the copy production portion. The one processor has complete control of the second processor via a multiprocessor connector.

Computer-controlled copier-printers

A programmable controller includes a random access memory for storing signals relating to a plurality of programs executable in the controller. A portion of the memory addressing is zoned for enabling one or more programs to have exclusive access to that zone. The addressability of input/output registers, diagnostic registers and selected other units of common interest to all such programs are addressable in each of the plurality of zones as if such registers were uniquely assigned to such respective memory zones.

Growing community of inventors

Boulder, CO, United States of America

David E Finlay