International Business Machines Corporation

David D Litten

Steven Frederick Oakland

Pamela Sue Gillis

Roderick Michael West

Edward Kelley Evans

Stephen B Barrett

Daniel Joseph Liguori

Peter Casavant

Hiroyuki Ando

A system and methods of balancing scan chains and, more particularly, a system and methods of load balancing scan chains into hierarchically designed integrated circuits. The method includes estimating or calculating a maximum scan chain length L and creating a maximum number of scan chains of length L in each hierarchical block. The method further includes distributing remaining scan bits in each hierarchical block into additional scan chains, and creating chip-level scan chains by using the scan chains of maximum length L and by forming additional chip-level scan chains of maximum length L by distributing the additional scan chains of maximum length LR, plus any remaining top-level scan bits, among the additional chip-level scan chains of maximum length L.

System and methods of balancing scan chains and inserting the balanced-length scan chains into hierarchically designed integrated circuits

A boundary scan register circuit and a method of characterization testing. The boundary scan register circuit, including: a multiplicity of boundary scan cells connected in series, each boundary scan cell having a latch; means for isolating the boundary scan cells into one or more boundary scan segments, each boundary scan segment containing a different set of the boundary scan cells; and means for characterizing signal propagation through each boundary scan segment.

Method and circuit using boundary scan cells for design library analysis

A programmable serializer comprising a multi-bit input port, a multi-bit output port, at least one multiplexer and at least one programmable address counter corresponding to the multiplexer for generating a sequence of multiplexer data input addresses that are inputted into the multiplexer address input. The multiplexer has an output connected to the multi-bit output port, an address input and a plurality of data input channels having addresses. Each data input channel is connected to a corresponding bit of the multi-bit input port. At least one data input channel is coupled to the multiplexer output when the corresponding address of the data input channel is applied to the address input. The programmable address counter receives and stores an initial address value, an address increment value and a count value and generates a sequence of addresses based on these values. The initial address value represents the multiplexer data channel that is to be initially coupled to the multiplexer output. The address increment value represents the increment that must be added to a current address in order to reach a next address. The count value represents the number of address that must be generated by the counter prior to restarting the sequence at the initial address value.

Programmable serializer using multiplexer and programmable address

Growing community of inventors

Jericho, VT, United States of America

David D Litten