Samsung Electronics Co., Ltd.

Nvidia Corporation

David Conrad Tannenbaum

Srinivasan Iyer

Stuart F Oberman

Keshavan Varadarajan

Ming Yiu Siu

Andrew D Bowen

Christopher James Goodman

Gabriel T Dagani

Christopher P Frascati

Mitchell K Alsup

Derek Lentz

Robert W Gimby

Veynu Narasiman

Henry Packard Moreton

Shirish C Gadre

Rahul Kumar

Michael Alan Fetterman

Dominic Acocella

Lawrence Howard Rubin

Thomas Melvin Ogletree

Colin Sprinkle

Raun M Krisch

Jeffrey B Moskal

Srinivasan (Vasu) Iyer

Fnu Gurupad

Zachary Neyland

F N U Gurupad

Rama S B Harihara

John Erik Lindholm

John Matthew Burgess

Daniel Finchelstein

Vimal S Parikh

Harold Robert Feldman Zatz

Robert Steven Glanville

Robert Jan Schutten

Abhinav Golas

Craig Michael Wittenbrink

Arun Radhakrishnan

Nilanjan Goswami

Thomas H Kong

Vikash Kumar

Sushant Kondguli

Ian Chi Yan Kwong

Jakob Nebeker

Tejash M Shah

Steven Gregory Foster, Jr

Gregory Bergschneider

Michael Phillip

Manshila Adlakha

Ian-Chi Yan Kwong

Ming (Michael) Y Siu

Adithya Hrudhayan Krishnamurthy

Robert Metzger

Srinidhi Padmanabhan

Simon Waters

A system and a method are disclosed improving forward progress of preempted workloads. A graphics pipeline processes tiles of a first low-priority job. A controller stops the first job by resetting the GPU and preempting the first job with a second job having a higher priority, determine whether the first job has been previously preempted one or more times, and adjust a batch-binning parameter reducing a likelihood that the first job will again be preempted in the current frame. In one embodiment, the controller is configured to stop the first job at a preemption boundary during a draw call or by resetting the GPU. A batch-binning parameter may include postponing sorting primitives into tiles during a binning process, increasing a number of tiles for backend rendering, reducing a quality of anti-aliasing, decreasing a shading rate quality, and/or decreasing input resolution and increasing upscaling of the first job.

Method and apparatus for software based preemption using two-level binning to improve forward progress of preempted workloads

A method for performing a blending operation in a graphics processing unit may include multiplying a first value and a first blend factor for a component of a render target with a first multiply operation of a multiplier, multiplying a second value and a second blend factor for the component of the render target with a second multiply operation of the multiplier, and adding a first result of the first multiply operation and a second result of the second multiply operation. The method may further include bypassing the multiplier for a first blend factor of substantially zero. The method may further include, for a blend factor of substantially one: bypassing the multiplier, and providing the first value of the component of the render target as a result of the first multiply operation.

Methods and apparatus for efficient blending in a graphics pipeline

A graphics processing unit (GPU) and a method is disclosed that performs a convolution operation recast as a matrix multiplication operation. The GPU includes a register file, a processor and a state machine. The register file stores data of an input feature map and data of a filter weight kernel. The processor performs a convolution operation on data of the input feature map and data of the filter weight kernel as a matrix multiplication operation. The state machine facilitates performance of the convolution operation by unrolling the data of the input feature map and the data of the filter weight kernel in the register file. The state machine includes control registers that determine movement of data through the register file to perform the matrix multiplication operation on the data in the register file in an unrolled manner.

Flexible-access instructions for efficient access of ML data

A hybrid ray tracing system includes: a processor; and memory including instructions that, when executed by the processor, cause the processor to: identify a subset of pixels of an image to be ray-traced based on variable rate shading (VRS) screenspace image data; set, based on the VRS screenspace image data, one or more material properties of at least one object corresponding to the subset of pixels; and perform ray-tracing for the subset of pixels to generate a ray-traced image. The ray-tracing includes performing a limited ray casting process based on the set one or more material properties.

Systems and methods of adaptive, variable-rate, hybrid ray tracing

A method of packing coverage in a graphics processing unit (GPU) may include receiving an indication for a portion of an image, determining, based on the indication, a packing technique for the portion of the image, and packing coverage for the portion of the image based on the packing technique. The indication may include one or more of: an importance, a quality, a level of interest, a level of detail, or a variable-rate shading (VRS) level. The indication may be received from an application. The packing technique may include array merging. The array merging may include quad merging. The packing technique may include pixel piling. The packing technique may be a first packing technique, and the method may further include determining, based on the indication, a second packing technique for the portion of the image, and packing coverage for the portion of the image based on the second packing technique.

Methods and apparatus for pixel packing

A system and a method are disclosed for varying a pixel-rate functionality of a GPU as an optional feature without an explicit implementation from within an application. User interface (UI) content may be detected in a draw call of an application and a variable-rate shader lookup map may be generated based on the detected UI content. A pixel rate of 3D content may be increased using the variable-rate shader lookup map. Additionally or alternatively, other conditions may be detected for increasing the pixel rate, such as using information in an application profile, detecting high or low luminance values, detecting motion and/or detecting temporal anti-aliasing.

Method and apparatus for the automation of variable rate shading in a GPU driver context

A GPU includes shader cores and a shader warp packer unit. The shader warp packer unit may receive a first primitive associated with a first partially covered quad, and a second primitive associated with a second partially covered quad. The shader warp packer unit may determine that the first partially covered quad and the second partially covered quad have non-overlapping coverage. The shader warp packer unit may pack the first partially covered quad and the second partially covered quad into a packed quad. The shader warp packer unit may send the packed quad to the shader cores. The first partially covered quad and the second partially covered quad may be spatially disjoint from each other. The shader cores may receive and process the packed quad with no loss of information relative to the shader cores individually processing the first partially covered quad and the second partially covered quad.

Method for performing shader occupancy for small primitives

An interpolation method may include scheduling spatially adjacent image blocks for interpolation, and calculating ranges of values of an attribute of the image blocks, wherein at least one value for a first one of the image blocks may be used for a second one of the image blocks. Calculating the ranges of values may include calculating a root value of the attribute at a root location of an array of the spatially adjacent image blocks, and adding incremental values of the attribute to the root value at points of the image blocks that are offset from the root location. The root location may be centrally located in an array of the spatially adjacent image blocks. The interpolation may be calculated in a diagonal hierarchical manner based on a plane equation.

Methods and apparatus for efficient range calculation

A method for performing an atomic memory operation may include receiving an atomic input, receiving an address for an atomic memory location, and performing an atomic operation on the atomic memory location based on the atomic input, wherein performing the atomic operation may include performing a first operation on a first portion of the atomic input, and performing a second operation, which may be different from the first operation, on a second portion of the atomic input. The method may further include storing a result of the first operation in a first portion of the atomic memory location, and storing a result of the second operation in a second portion of the atomic memory location. The method may further include returning an original content of the first portion of the atomic memory location concatenated with an original content of the second portion of the atomic memory location.

Methods and apparatus for atomic operations with multiple processing paths

A method of processing a workload in a graphics processing unit (GPU) may include detecting a work item of the workload in the GPU, determining a cache policy for the work item, and operating at least a portion of a cache memory hierarchy in the GPU for at least a portion of the work item based on the cache policy. The work item may be detected based on information received from an application and/or monitoring one or more performance counters by a driver and/or hardware detection logic. The method may further include monitoring one or more performance counters, wherein the cache policy for the work item may be determined and/or changed based on the one or more performance counters. The cache policy for the work item may be selected based on a runtime learning model.

Methods and apparatus for implementing cache policies in a graphics processing unit

A method of executing an early-Z draw call in a graphics processing pipeline may include detecting a late-Z draw call in the pipeline, determining a compatibility of a depth comparison function of the early-Z draw call with a depth comparison function of the late-Z draw call, and speculatively executing a fragment of the early-Z draw call with a shader. The method may further include determining that the fragment of the early-Z draw call passes the depth comparison function of the early-Z draw call, and updating a depth buffer with a depth value for the fragment of the early-Z draw call. The method may further include determining that the fragment of the early-Z draw call provides a correct result, and forwarding the speculative shader result for the fragment to a next stage of the pipeline.

Methods and apparatus for speculative execution of fragments in a graphics pipeline

A binning subsystem of a GPU includes a storage subsystem, a shader core to output first data via a first path, a selector to receive the first data via the first path, and to receive second data from the storage subsystem via a second path. The storage subsystem includes a binner unit and a control logic unit. The control logic unit causes the selector to transfer the first data or the second data to the binner unit. The binner unit may transfer binner output data to the shader core via a third path. The binner unit may transfer the binner output data to one or more subsequent stages of a graphics pipeline via a fourth path. The binner unit may transfer the binner output data to the storage subsystem via a fifth path. The control logic unit may control the binner unit such that the binner unit can be used for general purpose computation.

Shader accessible configurable binning subsystem

A method for interpolating values of an attribute for an image grid may include determining a root value of the attribute for a root node located centrally in the image grid, pre-calculating metadata for multiple child nodes in one or more hierarchical levels based on one or more gradients of the attribute, and deriving values of the attribute for each of the child nodes at each of the hierarchical levels based on the corresponding root value and metadata for the hierarchical level of each child node, wherein each child node may be used as a root node in the next hierarchical level. The image grid may have multiple outer cells arranged radially around a central cell, and the root node may be located in the central cell.

Methods and apparatus for efficient interpolation

A system and method is disclosed that allows multiple casting devices to work together to populate a large display screen according to the subject matter disclosed herein. The system includes a receiving device that includes two or more screen-cast receivers and a controller. Each screen-cast receiver receives from a corresponding casting device at least a portion of a frame of original content of the corresponding casting device generated in a native resolution of the corresponding casting device. The controller synchronizes each received portion of the frame of the original content of the corresponding casting device to form a video output signal that comprises a combination of each received portion, in addition to any internally generated content derived by the receiving display. A casting device may be a smartphone, a tablet, or a computing device, such as a laptop computer.

Method and apparatus for displaying multiple devices on shared screen

A system and a method are disclosed that optimizes a graphics driver. The system may be embodied as a computing device that includes a storage that is internal to the computing device, a graphic processing unit that includes a driver and a controller. The controller may be configured to run a daemon process that optimizes a shader and/or a shader pipeline for an application that is resident on the computing device when the computing device is not running the application and stores at least one optimization for the shader in the storage. The at least one optimization may be based on the application. The daemon process may further receive a request from the driver of the GPU for an optimization for the shader/shader pipeline during a runtime compilation of the shader and provide the at least one optimization to the driver of the GPU from the storage.

Method and apparatus for graphics driver optimization using daemon-based resources

Growing community of inventors

Austin, TX, United States of America

David Conrad Tannenbaum