Nvidia Corporation

David Charles Patrick

Dale L Kirkland

Steven James Heinrich

Henry Packard Moreton

Ziyad Sami Hakura

Eric Brian Lum

Nirmal Raj Saxena

Yury Y Uralsky

Naveen Cherukuri

Peter C Mills

Manan Patel

Liang Yin

Gentaro Hirota

Walter Robert Steiner

Praveen Joginipally

Vaishali Kulkarni

Adam Hendrickson

Sandeep Navada

Saurabh Hukerikar

Paul Racunas

Yiyang Feng

Abhijeet Ghadge

Various embodiments include a parallel processing computer system that detects memory errors as a memory client loads data from memory and disables the memory client from storing data to memory, thereby reducing the likelihood that the memory error propagates to other memory clients. The memory client initiates a stall sequence, while other memory clients continue to execute instructions and the memory continues to service memory load and store operations. When a memory error is detected, a specific bit pattern is stored in conjunction with the data associated with the memory error. When the data is copied from one memory to another memory, the specific bit pattern is also copied, in order to identify the data as having a memory error.

Error containment for enabling local checkpoint and recovery

A graphics processing pipeline includes three architectural features that allow a fragment shader to efficiently calculate per-sample attribute values using barycentric coordinates and per-vertex attributes. The first feature is barycentric coordinate injection to provide barycentric coordinates to the fragment shader. The second feature is an attribute qualifier that allows an attribute of a graphics primitive to be processed without conventional fixed-function interpolation. The third feature is a direct access path from the fragment shader to triangle data storage hardware resources where vertex attribute data and/or plane equation coefficients are stored. Allowing the fragment shader to calculate per-sample attribute values in this way advantageously increases system flexibility while reducing workload associated with triangle plane equation setup.

System-generated stable barycentric coordinates and direct plane equation access

In a graphics processing pipeline, a processing unit establishes a bounding box around a polygon in order to identify sample points that are covered by the polygon. For a given sample point included within the bounding box, the processing unit constructs a set of lines that intersect at the sample point, where each line in the set of lines is parallel to at least one side of the polygon. When all vertices of the polygon reside on one side of at least one line in the set of lines, the processing unit may reduce the size of the bounding box to exclude the sample point.

Method and system for reducing a polygon bounding box

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Madison, AL, United States of America

David Charles Patrick