Texas Instruments Corporation

David C Guiling

Binghua Hu

Weidong Tian

Pushpa Mahalingam

Sopa Chevacharoenkul

Xinfen Chen

Marshall O Cathey, Jr

A method of forming integrated circuits (IC) having at least one metal insulator metal (MIM) capacitor. A bottom electrode is formed on a predetermined region of a semiconductor surface of a substrate. At least one dielectric layer including silicon is formed on the bottom electrode, wherein a thickness of the dielectric layer is &#x3c;1,000 A. A top electrode layer is formed on the dielectric layer. A patterned masking layer is formed on the top electrode layer. Etching using dry-etching at least in part is used to etch the top electrode layer outside the patterned masking layer to reach the dielectric layer, which removes &#x2266;100 A of the thickness of the dielectric layer. The dry etch process includes using a first halogen comprising gas, a second halogen comprising gas that comprises fluorine, and a carrier gas.

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Garland, FL, United States of America

David C Guiling