Cisco Technology, Inc.

Qualcomm Incorporated

David Belz

Eyal Oren

Garry Paul Epps

Michael Laor

Alon Ratinsky

Syed Naseef

Systems and methods for unifying multiple audio bus interfaces in an audio system are disclosed herein. In one aspect, an integrated circuit (IC) comprises a primary slave audio device comprising a first control circuit, and a dependent slave audio device comprising a second control circuit. The primary slave audio device and the dependent slave audio device are communicatively coupled via a slave status link, and the first control circuit and the second control circuit each configured to receive, from a master audio device, a mode instruction that indicates operation in one of a detach mode and a unify mode. The second control circuit is configured to, while operating in the detach mode, transmit a slave status to the master audio device via a second control lane, and, while operating in the unify mode, transmit the slave status to the primary slave audio device via the slave status link.

Unifying multiple audio bus interfaces in an audio system

A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in a multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Using bandwidth management techniques, each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path includes a buffer/queuing circuit similar to that used in the receive path and can include another pipelined switch. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus, congestion avoidance, and bandwidth management hardware.

Pipelined packet switching and queuing architecture

Methods and apparatus are disclosed for using a programmable lookup word generator to produce a lookup word for use by a content-addressable memory. The programmable lookup word generator includes a profile memory which contains instructions on how to build a particular lookup word. The programmable lookup word generator receives a set of information and possibly other operands typically including a profile selection. Based on the profile selection, a set of instructions is retrieved from the profile memory. Control logic uses this set of instructions to build the lookup word by extracting portions of the received information and other operands and ordering these extracted portions possibly with additional information to build the lookup word. The lookup word is then used by a CAM, typically to classify the received set of information and other operands. In one context, the CAM produces a packet classification indication in a communication or computer system.

Method and apparatus for dynamically generating lookup words for content-addressable memories

Methods and apparatus are disclosed for implementing and using multiple virtual portions of an associative memory. An associative memory is programmed with multiple sets of entries, each of the multiple sets of entries including a different unique decoder field. A piece of information is received including a data item. A decoder field is identified. The decoder field and the data item are typically included in a lookup word used in a lookup operation in the associated memory, with the decoder field identifying which of the multiple sets of entries to search based on the data item. In one implementation, a nested condition associated with the data item is identified, and in response, multiple lookup words are generated with a predefined set of decoder fields for the data item. Multiple levels of decoder fields may be used to identify multiple subsets of entries within one of the multiple sets of entries.

Method and apparatus for implementing and using multiple virtual portions of physical associative memories

Methods and apparatus are disclosed for maintaining netflow statistics using an associative memory to identify and maintain netflows. A lookup operation is performed on a set of associative memory entries to produce an associative memory result directly or after a subsequent memory read operation. In response to the associative memory result corresponding to a not found condition, an entry is added to the set of associative memory entries. Otherwise, a statistics entry in the set of statistics is updated based on the associative memory result. In one implementation, the associative memory is programmed with a set of permanent netflow entries and a set of dynamic or nonpermanent netflow entries, which are maintained in the form of a queue or ring buffer. In one embodiment, when the number of dynamic entries exceeds a threshold value, one or more of the dynamic entries and their corresponding statistics values are flushed.

Method and apparatus for maintaining netflow statistics using an associative memory to identify and maintain netflows

Methods and apparatus are disclosed for matching a string with multiple lookups using a single associative memory, such as, but not limited to binary and ternary content-addressable memories (CAMs). In one implementation, an information string is partitioned into multiple segments. A first lookup operation is performed on the associative memory using the first segment to produce a first associative memory result, which is used as input to a memory lookup operation to produce a first result. The first result can be programmed to have any desired value or length. This first result along with a second segment of the information string is then used as input to the same associative memory to produce a second associative memory result, which is typically used as input to a memory lookup operation to produce a second result. This process can be repeated for an arbitrary or predetermined number of times.

Growing community of inventors

Raanana, Israel

David Belz