Apple Inc.

Pixart Imaging Incorporated

Amazon Technologies, Inc.

David B Townsley

James J Blanc

Sarangan Narasimhan

Andrew Gong

David C Buuck

Paul J Thompson

Dale Richard Adams

Vaughn Todd Arnold

William Alan Saperstein

Bradley David Urban

Shaoan Chin

Steven E Austin

Stephen J Kim

Michael D Johnson

Wing-Hong Chow

Daniel G Miranda

Eva Henin

Helder Ramalho

Various embodiments of a capacitive touchscreen system and corresponding methods are described. A touchscreen controller is operably connected to a first plurality of drive electrodes, a second plurality of sense electrodes, and a host processor. The touchscreen controller has computer-readable button group programming instructions and data loaded into a first memory portion thereof from the host processor that comprise steps for sensing and arbitrating among touches occurring on and within a first plurality of buttons. Firmware instructions and data are loaded into a second portion of the memory of the touchscreen controller. The first plurality of buttons is arranged in a first group on the touchscreen, and the first group is located within a first portion of the touchscreen. Capacitive sensing of touches occurring on and within at least second portions of the touchscreen that are located outside the first portion of the touchscreen are controlled by the firmware instructions.

Method and apparatus for arbitrating among contiguous buttons on a capacitive touchscreen

Each of one or more temperature sensors of a computing system can measure and provide a temperature value (e.g., provide temperature data) to the system. In some embodiments, the system can apply an offset value, a time-based filter, and a weighting factor to each temperature value received from the one or more temperature sensors of the system. Based, at least in part, on the offsetting, filtering, and/or weighting, the computing system can determine (e.g., calculate, estimate, predict, etc.,) a temperature value representative of an enclosure temperature of the system. In some embodiments, based on the determined temperature value that is representative of the enclosure temperature, the computing system can perform appropriate subsequent processing in accordance with thermal management of the system.

Determining temperature using multiple sensors

A power system fault handling mechanism for portable electronic devices having multiple power supplies. A safety-net circuit is triggered when a power fault condition is detected. The safety-net circuit is a diode-based bridging circuit which couples all available power supplies to the power load, yet avoids feeding power back from any of the supplies to one another. This ensures that the load continues to receive power after a fault condition occurs without interruption. A microcontroller may then implement a routine to switch to a working power supply so that the device may resume normal operation. The power system fault detection mechanism therefor allows for the switching between system power supplies without disrupting a running process.

Power fault protection in a computer system having multiple power supplies

A computer system having at least two subsystems which generate video signals and which share the same video display terminal. Provision is made to allow disabling of the current output of each system and controlling line reflections.

shared video display in a multiple processor computer system

An apparatus and method to accomodate a card designed to operate, with an alternate bus standard within a computer designed to operate with a primary bus standard, where the primary bus standard and the alternate bus standard are not directly compatible. The card is designed to fit within the computer in the available physical space and to connect to a card connector as required for the primary bus. However, the card is designed to be electrically compatible with the alternate bus standard. In a preferred embodiment the card draws power and any other signals, perhaps including clock, that are useful to both bus standards, but the address, data and control bus signals for the alternate bus are delivered to the card through an independent channel. This independent channel can be a separate connector to carry any signals needed for the alternate bus standard, which according to the application may or may not repeat signals already available through the primary bus.

Apparatus and method for implementing an alternate bus standard in a

A master agent and a slave agent are interconnected over a two-conductor bus system. One conductor is utilized to transfer data signals between the agents and the second conductor is utilized to transfer a clock signal between the agents. The master agent includes a single data port for both input and output. The slave agent includes two data ports: an input port and an output port. The input port and the output port are coupled to a single conductor, thereby allowing data to be input to and output from the slave agent on a single line. An open collector device is situated between the output port of the slave agent and the data conductor. Data is transferred between the master and slave agents by first synchronizing the agents. The agents are synchronized by first allowing the data conductor to obtain a high state. Upon sensing the data conductor high, the master agent drives the clock conductor to a low state. The slave agent responds by driving the data conductor low if the agent is ready for a transfer. The master agent then drives the clock conductor high in response to the slave agent driving the data conductor low. The slave agent then drives the data conductor high, and prepares for the data transfer.

Method and apparatus for providing a high throughput two-conductor

A circuit enabling simultaneous independent charging, sequential charging and sequential discharging of multiple batteries within a computer system and a method for charging the batteries independent of their technology or chemistry. Each battery of the multiple batteries in incorporated within a battery pack. The battery pack includes at least the battery, but may also include a module for supplying information regarding the battery to a system micro-controller unit to assist the system micro-controller unit in charging of the battery. For such battery packs, the method for charging each battery, regardless of its technology or chemistry and without hardware modification or software downloading of information, includes a monitoring phase, a charging phase and an error phase.

Circuit offering sequential discharge and simultaneous charge for a

A novel battery monitoring device is described. The monitoring device determines amount of battery self-discharge, determines amount of battery discharge from a monitoring circuit, determines amount of battery discharge from a host device when the host device is in a first power consumption mode, and determines amount of battery discharge from the host device when the host device is in a second power consumption mode. The first mode causes greater discharge of the battery during a given period of time than the second mode.

Method and apparatus for monitoring discharge of a battery device based

A method and apparatus for reducing the power consumption of a processor in a computer system where a programming structure running on the processor determines when the processor is in an inactive state to cause clocking signals and the power supply to be disabled to the processor. The processor is again coupled to the power supply and the clock signals in response to a periodic interrupt signal, a non-periodic interrupt or a bus request from a peripheral device. Thereafter, the programming structure signals the control logic again when the processor reenters the inactive state, such that the control logic disables the clock signals and decouples the power supply to the processor when the processor returns to the inactive state. The method is extended to offer the ability to shut down the processor from programming structures running on alternate masters or subsystem controllers within the same system.

Apparatus and method for reducing power consumption in a computer system

Power fault protection in a computer system having multiple power

A power system fault handling mechanism for portable electronic devices having multiple power supplies. A safety-net circuit is triggered when a power fault condition is detected. The safety-net circuit is a diode-based bridging circuit which couples all available power supplies to the power load, yet avoids feeding power back from any of the supplies to one another. This ensures that the load continues to receive power after a fault condition occurs without interruption. A microcontroller may then implement routines to switch to a working power supply so that the device may resume normal operation. The power system fault detection mechanism thus allows for the switching between system power supplies without disrupting a running process.

Power system configuration and recovery from a power fault condition in

A system for distributing power throughout a computer system, preferably a portable computer, while still maintaining a desired power mode hierarchy so that the most critical components or circuits-within the computer system receive power before non-critical components. The system includes a micro-controller unit for controlling power allocations throughout the system. The system further includes a power connector for interfacing with a dual-line AC-to-DC adapter, a switching regulator for providing regulated DC power outputs to a central processing unit, memory unit and the like, a battery switching circuit having two battery packs to support simultaneous charging and sequential discharging of the battery packs in the event that the AC-to-DC adapter is decoupled from the computer system and an auxiliary battery source for supplying power to critical components in the computer system as a last resort.

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Cupertino, CA, United States of America

David B Townsley