Lucent Technologies Inc.

At+t Corp.

Agere Systems Inc.

At&t Ipm Corp.

Zenko Technologies, Inc.

David Andrew Inglis

Bryan D Ackland

Alexander G Dickinson

El-Sayed I Eid

Kameran Azadet

Hyun K Lee

Gregory Peter Kochanski

Yusuke Ota

Wilhelm C Fischer

Marc J Loinaz

El-Sayed Ibrarhim Eid

Bryan David Ackland

A clock and data recovery circuit and method are used in a digital data communications system. The circuit and method are effectively employed for high speed, burst-mode transmission and allow rapid recovery of the clock and data signals without the need for an extended header, and notwithstanding the presence of substantial timing jitter. The method adaptively selects from among three delay times for the extraction of data by identifying a frequently recurring incoming pattern in the incoming data. The delay time is selected in a manner that insures that the same pattern is present in the reconstructed, resynchronized output data.

Data sampling circuit and method for clock and data recovery

A mixed-mode crosstalk canceller is disclosed that performs crosstalk cancellation in the continuous time domain. The disclosed mixed-mode crosstalk canceller processes the pulse amplitude modulated (PAM) digital signal to be transmitted as well as the received signal to compensate for the crosstalk between the transmit and receive signals. The output of the crosstalk canceller is subtracted from the received signal in the continuous time domain. Thus, the transmit symbol clock and the receive symbol clock can be asynchronous. The tap weights for the crosstalk cancellation are illustratively obtained using a modified version of the least mean square (LMS) algorithm for discrete time signals. The modified least mean square (LMS) algorithm is applied for continuous time signals that are derived from different clocks. Since, the LMS algorithm requires a costly multiplication of the error signal, e(t), and the digital transmit signal, x (t), and it is only necessary to go in the direction of the gradient with the steepest decent, computational gains are achieved using a correlation multiplier that quantizes e(t) and x (t) with only one or two bits. The quantized version of the error signal, e(t), indicates the sign of the error (positive or negative) and is obtained in the illustrative embodiment by comparing the error signal to zero. A crosstalk canceller updates each tap weight utilizing the disclosed correlation multiplier that provides a signal indicating whether the tap weight needs to be increased or decreased to a charge pump that produces a current in the proper direction.

Mixed-mode next/echo canceller for pulse amplitude modulated (PAM) signals

An image sensor circuit which employs a photodiode in conjunction with a charge transfer mechanism. By employing the photodiode, at least a portion of the light sensed does not pass through a layer of polysilicon, and so is not prevented from reaching the sensing area by the polysilicon. The image sensor circuit of the invention is made up of device structures readily available in standard CMOS process technologies Advantageously, image sensors embodying the invention show substantially improved quantum efficiency for short wavelength light over the prior art sensors. In addition, image sensors embodying the invention display improved dark current uniformity, thus improving yield.

MOS image sensor

A shield region of metallization is formed in a first metallization layer of an integrated circuit so as to increase the metal density of the first metallization layer to at least a minimum density required for proper fabrication. The shield region is coupled via an amplifier or other suitable coupling mechanism to at least a portion of another metallization layer overlying or underlying the first metallization layer in the integrated circuit, such that the shield region acts to reduce parasitic capacitance associated with a circuit node in the other metallization layer. In an illustrative fingerprint sensor cell implementation, the shield region is in the form of a shield plate underlying a sensor plate in the sensor cell and serves to increase the metal density of a lower-level metallization layer in the cell. The sensor plate is coupled to the shield plate via a unity-gain amplifier, so as to reduce the parasitic capacitance seen by the sensor plate, thereby improving the ability of the sensor cell to detect fingerprint characteristics. The invention can provide similar advantages in numerous other integrated circuit applications.

Methods and apparatus for increasing metal density in an integrated

A single-polysilicon active pixel, methods for operating and making same, and an imaging device employing same are disclosed. The single-polysilicon active pixel comprises a photo site located on a substrate for generating and storing charge carriers, the charge carriers being generated from photonic energy incident upon the photo site and semiconductor substrate, a photo gate, a transfer transistor and output and reset electronics. The gate of the transfer transistor and the photo gate are defined in a single layer of polysilicon disposed on the semiconductor substrate. The source of transfer transistor is a doped region of substrate, referred to as a coupling diffusion, which provides the electrical coupling between the photo gate and the transfer transistor. The coupling diffusion allows for the transfer of a signal stored in a photo site under the photo gate to the output electronics for processing. A plurality of such single-polysilicon active pixels can be arranged to form an imaging system. The single-polysilicon active pixel may be operated by biasing the transfer transistor to the low operating voltage of the pixel, for example, 0 volts. By virtue of the structure of the single-polysilicon active pixel, this mode of operation results in the same timing as if the transfer transistor were clocked, but neither a clock nor the associated driving circuitry arc required. However, there is little no tendency for image lag as occurs in double polysilicon active pixels when they are operated in a manner which avoids clocking the transfer gate.

Single-polysilicon CMOS active pixel image sensor

An active pixel image sensor includes an array of pixels arranged in a first group and a second group. The first group may constitute a row and the second group may constitute a column, for example. A first common conductor is coupled to the pixels in the first group for conducting control signals. A second common conductor is coupled to the pixels in the second group for selectively transmitting signals to processing electronics. Each of the pixels includes a plurality of sensing elements that are each configured for capturing a portion of energy from an object to be imaged. At least one of the sensing elements is of a type distinct from another of the sensing elements. For example, one of the sensing elements may be a photogate and another may be a photodiode. An amplifying arrangement is provided for receiving signals from selected ones of the plurality of sensing elements and for selectively providing output signals to the second common conductor.

Combined photogate and photodiode active pixel image sensor

An active pixel imaging system and method to generate an differential output signal consisting of the differences in a viewed image between adjacent detected flames. A buffered electrical charge storage capacity of the active pixel sensor is utilized to provide a system with reduced complexity and hardware requirements. In the imaging system, when a particular active pixel sensor is activated it generates a voltage signal corresponding to a previous frame's detect light intensity before the pixel is reset to generate a voltage signal corresponding to a present frame's detected light intensity. A differential output circuit is used to generate a differential output signal based on these two generated voltage signals.

Active pixel sensor and imaging system having differential mode

A method and apparatus is provided for comparing a first input voltage to a second input voltage. In one embodiment of the invention, a first input voltage is transformed into a first current flowing through a first transistor and a second transistor. A second input voltage is transformed into a second current flowing through the first transistor while the first current continues flowing through the second transistor. A difference current is developed which represents the difference between the first current and the second current. An indicator signal is generated which indicates the larger of the first and second input voltages based on the value of the difference current.

Voltage comparator requiring no compensating offset voltage

The single-polysilicon active pixel comprises a photo site located on a substrate for generating and storing charge carriers, the charge carriers being generated from photonic energy incident upon the photo site and semiconductor substrate, a photo gate, a transfer transistor and output and reset electronics. The gate of the transfer transistor and the photo gate are defined in a single layer of polysilicon disposed on the semiconductor substrate. The source of transfer transistor is a doped region of substrate, referred to as a coupling diffusion, which provides the electrical coupling between the photo gate and the transfer transistor. The coupling diffusion allows for the transfer of a signal stored in a photo site under the photo gate to the output electronics for processing. The single-polysilicon active pixel may be operated by biasing the transfer transistor to the low operating voltage of the pixel, for example, 0 volts. By virtue of the structure of the single-polysilicon active pixel, this mode of operation results in the same timing as if the transfer transistor were clocked, but neither a clock nor the associated driving circuitry are required. However, there is little no tendency for image lag as occurs in double polysilicon active pixels when they are operated in a manner which avoids clocking the transfer gate.

Single-polysilicon CMOS active pixel

The imaging pixel according to the present invention includes a floating gate pixel node capable of nondestructive readout and active source follower output circuitry suitable for combination with other like imaging pixels to form an imaging array.

Imaging active pixel device having a non-destructive read-out gate

A clocked comparator circuit compares the primary and backup power supply voltages to a system. When the primary voltage falls a given amount below the backup, the circuit provides a signal that may be used to switch to the backup power supply. When the primary voltage is again present, the circuit can switch back to primary power. Alternatively, or additionally, a signal may be generated to initiate graceful shutdown of the system. The clock to the comparator typically operates at a higher frequency when operating on the primary voltage, and a lower frequency when operating on the backup voltage. This circuit is typically used with a portable system that uses a rechargeable battery as its primary power supply. The backup power supply may be a long-life battery that provides power to only a portion of the system. For example, in a computer, only a static memory may be powered by the backup, to allow the full system to retain its proper configuration when the primary power supply is again activated. The circuit may be implemented with all digital logic, typically CMOS, thus minimizing power dissipation and increasing its versatility.

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Holmdel, NJ, United States of America

David Andrew Inglis