Supercomputer Systems Limited Partnership

Sun Microsystems, Inc.

Silicon Graphics, Incorporated

David A Seberger

David M Cox

Don A Van Dyke

Jon A Masamitsu

Robert E Strout, Ii

James C Rasbold

Kelly T O'Hair

Timothy J Cramer

Linda J O'Gara

Ashok Chandramouli

Richard E Hessel

George A Spix

Steve S Chen

Diane M Wengelski

Gregory G Gaertner

Keith J Thompson

David M Barkai

Jeremiah D Burke

Mark D Johnson

Giacomo G Brussino

Stuart W Hawkinson

Steven G Oslon

David R Wallace

Serguei L Wenitsky

Serguei V Morosov

An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.

Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes

Apparatus, methods and computer program products are disclosed that enable a compiler to generate efficient code to access stack registers on a register stack. The invention operates by transforming a three-operand instruction, within a compiler's intermediate representation, to one or more fewer-than-three-operand instructions. The invention also transforms the instruction's operand addressing from an access to a pseudo-named register to an access to a stack register through stack offset into a register stack. The invention also determines the register stack state at each instruction responsive to register stack permutations and maps the stack offset accordingly for each subsequent access to a stack register.

Method, apparatus and computer program product for optimizing registers

A parser for parsing computer programs in a compiler has parsing tables arranged as linear vectors. In a reduction portion of the parser, a production table and a lookahead set table have paired entries at identical address offsets such that a one-to-one relationship exists between each lookahead set in the lookahead set table and the representation of the lookahead set in the lookahead set table. In a read transition portion of the parser, an entrance symbol table has entries paired with transition state representations and each pair being at an identical address offset in the respective tables. For a reduction or read transition operation, the lookahead set table or the entrance symbol table is scanned to find the appropriate entry. Once the appropriate entry is found, the production table or the transition state table is addressed using the offset of the appropriate entry found during the scanning process.

Vectorized LR parsing of computer programs

System and method for controlling a highly parallel multiprocessor using

A modular compilation system that utilizes a fully integrated hierarchical representation as a common intermediate representation to compile source code programs written in one or more procedural programming languages into an executable object code file. The structure of the integrated common intermediate representation supports machine-independent optimizations, as well as machine-dependent optimizations, and also supports source-level debugging of the executable object code file. The integrated hierarchical representation (IHR) is language independent and is shared by all of the components of the software development system, including the debugger.

Computer with integrated hierarchical representation (IHR) of program

Growing community of inventors

Livermore, CA, United States of America

David A Seberger