University of California

David A Hodges

Paul R Gray

James L McCreary

Joey Doernberg

A flash ADC utilizes parallel weighted capacitive arrays and a resistor string to provide reference voltage intervals and an encoder for indicating the reference voltage interval wherein an input voltage lies. For an embodiment having N branches, the reference voltage intervals are subdivided into N sub-intervals and each succeeding clock cycle.

Flash A/D converter using capacitor arrays

An array of binary weighted capacitors, an additional capacitor having a capacitance value equivalent to that of the least of the binary weighted capacitors, a voltage comparator, switches for interconnecting the capacitors with certain predetermined voltage levels and the comparator, and a sequencing circuit are included. One side of all of the capacitors is connected to one input terminal on the comparator and the other side has applied thereto the signal to be quantized. Switch sequencing combines divided portions of a reference voltage with the signal to be quantized for presentation to the input of the comparator which thereby provides a serial digit output connected to the sequencing circuit. In this fashion, a linear conversion between an analog and a digital signal is made by the sequencing circuit. A nonlinear converter between digital and analog signal presentation is also disclosed. Resolution of the coder/decoder is increased by providing a reference voltage generator capable of supplying stepped increments of the reference voltage to the capacitor array during the comparison process.

Weighted capacitor analog/digital converting apparatus and method

An array of binary weighed capacitors, an additional capacitor having a capacitance value equivalent to that of the least of the binary weighted capacitors, a voltage comparator, switches for interconnecting the capacitors with certain predetermined voltage levels and the comparator, and a sequencing circuit are included. One side of all of the capacitors is connected to one input terminal on the comparator and the other side has applied thereto the signal to be quantized. Switch sequencing combines divided portions of a reference voltage with the signal to be quantized for presentation to the input of the comparator which thereby provides a serial digit output connected to the sequencing circuit. In this fashion, a linear conversion between an analog and a digital signal is made by the sequencing circuit. A nonlinear converter between digital and analog signal presentation is also disclosed.

Growing community of inventors

Berkeley, CA, United States of America

David A Hodges