International Business Machines Corporation

Globalfoundries Inc.

David A DeMuynck

Matthew D Moon

Melissa J Roma

Anthony K Stamper

Richard A Phelps

Shawn A Adderly

Brian M Czabaj

Craig E Schneider

Daniel A Delibac

John E Dillon

Shawn R Goddard

Kevin C Remillard

Kyle Babinski

Ross Duncan

Zhong-Xiang He

Edward Crandal Cooney, Iii

Eric Jeffrey White

Daniel Scott Vanslette

Gary L Milo

Dinh Dang

Sarah A McTaggart

Daniel R Miga

Thomas W Weeks

Jeffrey L Thompson

A method including forming a first metal wire in a first dielectric layer, the first metal wire including a first vertical side opposite from a second vertical side; and forming a second metal wire in a second dielectric layer above the first dielectric layer, the second metal wire including a third vertical side opposite from a fourth vertical side, where the first vertical side is laterally offset from the third vertical side by a first predetermined distance, and the second vertical side is laterally offset from the fourth vertical side by a second predetermined distance, where the first metal wire and the second metal wire are in direct contact with one another.

Metal wires of a stacked inductor

Disclosed is a method of manufacturing integrated circuit (IC) chips. In the method, wafers are received and the backside roughness levels of these wafers are determined. Based on the backside roughness levels, the wafers are sorted into different groups. Chips having the same design are manufactured on wafers from all of the different groups. However, during manufacturing, process(es) is/are performed differently on wafers from one or more of the different groups to minimize systematic variations in a specific parameter (e.g., wire width) in the resulting chips. Specifically, because systematic variations may occur when the exact same processes are used to form IC chips on wafers with different backside roughness levels, the method disclosed herein selectively adjusts one or more of those processes when performed on wafers from one or more of the different groups to ensure that the specific parameter is approximately equal in the resulting integrated IC chips.

Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughness

The disclosure relates generally to integrated circuits (IC), IC interconnects, and methods of fabricating the same, and more particularly, high performance inductors. The IC includes at least one trench within a dielectric layer disposed on a substrate. The trench is conformally coated with a liner and seed layer, and includes an interconnect within. The interconnect includes a hard mask on the sidewalls of the interconnect.

Integrated circuit and interconnect, and method of fabricating same

Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes layering metal and insulator materials on a sacrificial material formed on a substrate. The method further includes masking the layered metal and insulator materials. The method further includes forming an opening in the masking which overlaps with the sacrificial material. The method further includes etching the layered metal and insulator materials in a single etching process to form the beam structure, such that edges of the layered metal and insulator material are aligned. The method further includes forming a cavity about the beam structure through a venting.

Micro-electro-mechanical system (MEMS) structures and design structures

An apparatus for applying a layer to a hydrophobic surface. The apparatus including: a chuck having a top surface and rotatable about a axis perpendicular to the top surface and passing through a center point of the top surface; and hollow first and second dispense nozzles having respective first and second bores, the first and second dispense nozzles mounted on a application head disposed above the top surface of the chuck, the application head moveable in a direction parallel to the top surface of the chuck, the first dispense nozzle alignable over the center point when the application head is in a first position and the second dispense nozzle alignable over the center point when the application head is in a second position, at least a portion of the bore of second dispense tube having a maximum cross-sectional dimension of between about 0.5 millimeters and about 2.0 millimeters.

Apparatus for applying a layer to a hydrophobic surface

A method of forming a coating. The method includes: providing a substrate having a surface; forming a layer of water on the surface; and forming a layer of a material on the layer of water.

Method for applying a layer to a hydrophobic surface

Growing community of inventors

Underhill, VT, United States of America

David A DeMuynck