Lsi Logic Corporation

Lsi Corporation

David A Castaneda

Ernest Allen, Iii

Gerald L Shipley

Miaw Looi

A circuit for stabilizing soft bits in a bit stream, the circuit having a first register to receive an initial read of the bit stream, a second register to receive a subsequent read of the bit stream, a comparator to compare the initial read of the bit stream to the subsequent read of the bit stream, a third register to receive a comparison string having bits set in positions where the initial read of the bit stream and the subsequent read of the bit stream do not match, indicating a soft bit in the positions, and an accumulator to receive the comparison string for multiple subsequent reads of the bit stream, and track positions of all soft bits detected during the multiple subsequent reads.

Random seed stability with fuses

The present invention is directed to a method of identifying duplicate data elements in large data sets. This involves receiving the data sets. Dividing each data element in the data set into a series of data segments to define data keys. Generating an intermediate value for the each element in the data set using summed values for the data keys. Sorting the data entries using the intermediate values. Sorting the matched intermediate value entries using the data keys. Identifying the duplicate data elements in the data set.

Process for identifying duplicate values in very large data sets

According to one embodiment, a method of testing an integrated circuit is provided. The quiescent current measuring of an integrated circuit is measured at two voltages. The functional relationship between the current measurements is determined and compared against a predetermined functional relationship to determine whether a defect exists in the integrated circuit.

Method for testing IDD at multiple voltages

According to one embodiment, a method of testing an integrated circuit is provided. A reference voltage is coupled to each of a first and second comparator integrated on the chip. A supply voltage is compared to the reference voltage in a comparator to determine overvoltage or undervoltage conditions. The results of the comparison are stored and sizing and placing of at least one decoupling circuit in the circuit design is made based on the stored determinations.

VDD over and undervoltage measurement techniques using monitor cells

A method of manufacturing a semiconductor integrated circuit includes providing a fabricated integrated circuit on a wafer. A test fixture is connected to unencapsulated pads on the integrated circuit to monitor an operating parameter for the circuit and to determine a unique identifier for the die. The parameter is analyzed in post processing.

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Clackamas, OR, United States of America

David A Castaneda