Bull Hn Information Systems, Inc.

Other

Honeywell Information Systems Inc.

David A Bowman

David W Selway

Donald R Kesner

James H Phillips

David J Davis

Leonard Rabins

Clark D McCaslin

A redundant computer system including two systems capable of independent operation. The two systems correspondingly employ two independent clock generation and distribution (CGD) units which each issue clock and clock definer signals. The clock and definer signals of each system are used internally and are also sent to the other system. When the two systems are split, phase locked loops in each system are disabled, and each system is controlled by a precision oscillator in its own CGD unit When the two systems are merged, one CGD is designated as master and remains under control of its internal oscillator. The clock and definer signals of the master system are employed in the slave system to derive a signal which is used as the reference input to the slave system's phase locked loop from which the slave system's clock and definer signals are developed. Preferably, dual flip-flop phase detector type phase locked loops are employed. For higher frequency operation, it is desirable to incorporate certain correction circuitry which minimizes phase offset at apparent phase lock which is an inherent characteristic of this type of phase locked loop.

Apparatus for phase synchronizing clock signals in a fully redundant

A redundant computer system including two systems capable of independent operation. The two systems correspondingly employ two independent clock generation and distribution (CGD) units which each issue clock and clock definer signals. When the two systems are split, each system is controlled by the oscillator signal generated by its own CGD unit. When the two systems are merged, one oscillator is designated as master, and its output is employed to derive the clock and definer signals on both sides of the redundant system. Special logic included in each CGD unit ensures that the change from master to slave (or slave to master) operation is performed without error. This special logic includes circuitry which places a temporary hold at a predetermined logic level on the local oscillator signal, which is in use when the switch is made, when the local clock and definer signals are both at the predetermined logic level. The hold continues until the oscillator which is to 'take over' is also at the predetermined logic level.

Apparatus for coordinating clock oscillators in a fully redundant

A redundant computer system including two systems capable of independent operation. The two systems correspondingly employ two independent clock generation and distribution (CGD) units which each issue clock and clock definer signals. When the two systems are split, each system is controlled by the clock and definer signals generated by its own CGD unit. When the two systems are merged, one CGD unit is designated as master, and its clock and definer signals drives both sides of the redundant system. Special logic included in each CGD unit ensures that the change from master to slave (or slave to master) operation is performed without error. This special logic includes circuitry which places a temporary hold at a predetermined logic level on the local clock and definer signals, which are in use when the switch is made, when the local clock and definer signals are both at the predetermined logic level. The hold continues until the clock and definer signals which are to 'take over' are also at the predetermined logic level.

Apparatus for coordinating clock distribution in a fully redundant

A reconfigurable computer system which includes two computer subsystems, corresponding lines of the system busses of the two computer subsystems being interconnected by solid state switches. Each of the computer subsystems includes a control component, a service processor, which when an error is detected that would render the subsystem inoperative, causes the solid state switches to open to sever the connection between the system busses of the two computer subsystems so that the computer subsystem that has not suffered such a failure can continue to operate. A communication link is also established between the two service processors. Either, or both, service processors can sever the link between them.

Reconfigurable computer system

A relatively flexible thermoplastic air bag cover is provided including a front panel wherein switch activating members enhance activation of a membrane-type switch located at a switch location area of the front panel. This feature provides pressure points which enhance activation of the membrane-type switch. The switch activating members are located on the rear inner surface of the cover in one embodiment and, in another embodiment, on the upper surface of a back plate which provides a hollow compartment for the switch. The switch activating members can be integrally formed in the shape of small circles, ribs, raised dots, X's, etc.

Thermoplastic air bag cover having a membrane switch with enhanced

In order to increase the information exchange speed among the several transaction members or subsystems organized around a bus carried on a backpanel, all lines of the bus are isolated, using CMOS switches, from the stub to each transaction member which is not instantaneously required for information exchange. The CMOS switches are physically placed as close as practical to the junction of each individual stub to the bus proper. This is achieved by placing the integrated circuits containing the CMOS switches on each subsystem circuit board proximate the male-edge-connector-to-female-edge-connector regions at which the junctions between the bus proper and the stubs are established. Preferably, the CMOS switch integrated circuits are emplaced on the backpanel itself proximate the edge connector regions communicating with each of the subsystems.

Method and apparatus for increasing the speed of data exchange among the

An adjustable non-destructive exhibit mounting system includes a lever, a fulcrum for supporting the lever, and a device for adjustably urging an end of the lever against an exhibit, thereby securing the exhibit against a planar display surface. The end of the lever which contacts the exhibit is provided with a sleeve-like protecting pad. The mounting system can accommodate the mounting of various sized planar exhibits. The adjusting device includes a base which can rest against the display surface, a threaded bolt extending from the base and at least one nut threadably engaging the bolt. The nut may be set to urge the lever into a position tensioning the protecting pad against the exhibit.

Poster mounting system

A memory organization system is disclosed which comprises an improved, bit-organized RAM system. The invention substantially limits errors within the RAM system such that they are error-correctible by existing error detection and correction means. Commonly available RAMs are organized on a logic board such that each bit of a word being addressed is provided by a different RAM chip and is driven by a distinct driver. In this manner a malfunction in either a chip or a driver circuit results in only a one-bit error per word and overall system performance is also improved.

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Glendale, AZ, United States of America

David A Bowman