Performance Interconnect, Inc.

Dau-Tsuong Lu

John T Keating

The present invention comprises a high performance single chip or multi-chip package which combines a CTE controlled electronic substrate, a multi-layer interconnect, bare dice or packaged devices, a top layer encapsulant and an interposer to provide a compliant and de-mountable connection to a printed circuit board. The CTE controlled electronic substrate comprises a metal or composite shell around an encapsulated core holding vertical electrical conductors. The vertical connection comprises an array of stranded or braided electrical conductors which may be exposed on the top and or bottom of the electronic substrate to provide a de-mountable interface. An interconnect layer may be attached to the planar CTE controlled electronic substrate using an adhesive or polymer. Following the connection of the interconnect to the substrate, the bare dice and/or package may be attached to the interconnect.

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Clifton Park, NY, United States of America

Dau-Tsuong Lu