Freescale Semiconductor,inc.

Nxp Usa, Inc.

Dat Tat Tran

LeRoy Winemberg

Anis Mahmoud Jarrar

Xiaoxiao Wang

Nisar Ahmed

Jorge Arturo Corso

Orman G Shofner, Jr

Ender Yilmaz

Balaji Rajasekaran

Jifeng Chen

An integrated circuit includes a clock generator to generate a first clock signal, a delay circuit to generate a second clock signal as a delayed version of the first clock signal, and a plurality of series-connected delay elements having a plurality of outputs, wherein each output from an initial output to a last output is configured to provide the second clock signal delayed by an increasing number of series-connected delay elements. The circuit includes a plurality of flip-flops, wherein a first input of each flip flop is coupled to receive the first clock signal and a second input of each flip flop from an initial flip-flop to a last flip-flop is coupled to receive a corresponding output of the series-connected delay elements from the initial output to the last output, respectively. The circuit includes a plurality of sticky flops, each corresponding to a flip-flop of the plurality of flip-flops.

Power supply noise sensor

System circuitry includes a logic circuit having an input and an output that is a functional element of the system circuitry. Pattern application circuitry is coupled to the input of the logic circuit and provides an input pattern to the input of the logic circuit. The input pattern has a valid signature based upon a comparison of the input and the output of the logic circuit when the logic circuit is functioning properly. A logic comparator is coupled to the input and the output of the logic circuit and generates pulses in response to the input pattern. A counter is coupled to the logic comparator that obtains a count of the pulses generated by the logic comparator in response to the input pattern. A signature comparator is coupled to the counter and generates a warning signal if the valid signature is different from the count.

Functional path failure monitor

A data processing system on an integrated circuit includes a core that performs switching operations responsive to a system clock that draws current from the power supply network. An IR-drop detector includes a resistor ladder having outputs representative of an IR-drop caused by the core during the switching operations. The system further includes a plurality of amplifiers coupled to the outputs indicative of the IR-drop, a plurality of flip-flops coupled to the amplifiers, and a variable clock generator. The variable clock generator outputs a sampling clock comprising a group consisting of a variable phase or a variable frequency to the plurality of flip-flops. The flip-flops are triggered by the sampling clock so that the IR-drop at a time during a clock cycle of the system clock can be detected, and the peak IR-drop value for can be tracked.

Resolution programmable dynamic IR-drop sensor with peak IR-drop tracking abilities

Growing community of inventors

Round Rock, TX, United States of America

Dat Tat Tran