Fujitsu Corporation

Applied Materials, Inc.

Western Digital (fremont), Inc.

Dashun Steve Zhou

Michael G Lee

Alexei L Glebov

Karl Anthony Littau

Liubo Hong

Ronald A Barr

Aihua Chen

Ling Chen

Wen-chou Vincent Wang

Solomon I Beilin

Alfred W Mak

Michael G Peters

James J Roman

Yasuhito Takahashi

An optical beam splitter includes an input waveguide, two or more branching arms, two or more fan-out arms, and two or more output waveguides. The input waveguide receives an input light beam. The two or more branching arms are coupled to the input waveguide at a separation point and split the input light beam at the separation point into two or more light beams. Each fan-out arm is coupled to one of the branching arms and fans-out one of the two or more light beams to a predetermined output pitch. Each output waveguide is coupled to one of the fan-out arms and transmits one of the two or more light beams out of the optical beam splitter.

Optical beam splitter

Disclosed are optical modulators that provide high-speed modulation capability and compact size. In exemplary modulator embodiments, the branch waveguide cores are formed in different processing layers than the input waveguide core, and light is coupled from an input waveguide core to two branch waveguide cores along diagonal directions. The construction enables the input waveguide core to be made of low-loss material compared to the electro-optic material of the branch waveguide cores. Also disclosed are interconnect apparatuses that can be used in processing systems. Exemplary interconnect apparatuses provide various configurations of components that enable high-speed modulation and compact size. The exemplary interconnect apparatuses may use the exemplary optical modulators disclosed herein.

Optical interconnect apparatuses and electro-optic modulators for processing systems

A method for creating an integrated linear polarizer is provided. An electro-optical component is fabricated and may include a bottom electrode, a bottom cladding layer, side cladding features, an electro-optic polymer layer, a top cladding layer, and a top electrode. After fabrication, the electro-optical component is poled to create or enhance polarization properties of the electro-optic polymer layer. The electro-optical component may be heated to at least a first threshold temperature. An electric field may then be applied to the electro-optical component. In the presence of the electric field, the electro-optical component may be cooled to at or below a second threshold temperature that is less than the first threshold temperature. Once the electro-optical component has cooled to the second threshold temperature, the electric field may be removed.

Integrated linear polarizer

An integrated electro-optic module may contain a continuous layer of electro-optic polymer through both a splitter portion and a modulator portion in order to facilitate high speed data transmission. The integrated electro-optic module may be fabricated by depositing a bottom cladding layer on a wafer, creating side cladding features, depositing the electro-optic polymer, and coating with a top cladding layer. The electro-optic polymer in both the splitter portion and modulator portion of the integrated electro-optic module may create inverted-ridge waveguide structures. The waveguide in the splitter portion may have a first ridge depth, and the waveguide in the modulator portion may have a second ridge depth, the first ridge depth greater than the second ridge depth.

Integrated electro-optic module for high speed data transmission

The present invention provides an improved thin film write head and method of fabrication capable of providing an ultra-short yoke and/or an ultra-low conductor winding stack. The present invention reduces yoke length and stack height by forming the conductor winding in a trench etched from an insulation layer, preferably formed of an inorganic insulation material. A thin resist mask is used to define the width of the trench while the etch process defines the depth. Preferably, the insulation layer is formed on a different inorganic insulation material to control the etch process, thus, the conductor winding may be formed on the underlying layer. The conductor winding preferably is formed by depositing conductor material so that it fills the trench and then planarizing, such as by chemical mechanical polish, to remove conductor material deposited outside the trench. An organic insulation layer, such as cured photoresist, may be deposited on the planarized surface of the conductor winding to insulate it from an overlying yoke. This overlying organic insulation layer may also define the apex angle of the head. The present invention may have multiple layers of conductor winding. The subsequent layers of conductor may be formed similar to the first layer, or may be formed with conventional photoresist processes and structures. The present invention may utilize any known pole structure or material.

Ultra-short yoke and ultra-low stack height writer and method of fabrication

This invention provides a method and apparatus for substantially eliminating deposition on the edge of a wafer supported on a pedestal in a processing chamber. Process gas flow onto the wafer surface is inhibited from reaching the wafer edge and backside, by means of a shadow ring placed over the wafer without touching it. Deposition on the edge and backside of the wafer are therefore substantially eliminated. The shadow ring defines a cavity which circumscribes the wafer edge, into which purge gas is flowed. This purge gas flows out from the cavity through the gap between the shadow ring and the upper surface of the wafer. Alignment pins are placed on the wafer supporting surface of the pedestal. These pins have sloping surfaces and are arranged to guide the wafer to a centered position on the pedestal when the wafer is placed on the pedestal. These pins also serve to align the shadow ring to the pedestal and thence to the wafer. The shadow ring has a plurality of keyed formations which mate to the pins, and as the shadow ring and pedestal are brought together, the pins serve to align the shadow ring. This precise rotational alignment and centering of the shadow ring results in substantial elimination of edge deposition. The keyed formations have elliptical cross-sections to provide for radial movement of the pins with respect to the keyed formations due to thermal expansion.

Wafer edge deposition elimination

An encapsulation process for flip-chip bonding chips to a substrate encapsulates solder balls on the chip in a separate encapsulation process in which the chip is coated with encapsulation layer and then a portion of the encapsulation layer is removed to expose a portion of the solder balls.

Flip chip pre-assembly underfill process

A chemical mechanical cleaning method utilizes an ammonium persulphate solution with simultaneous mechanical brushing to remove residual slurry particles from copper surfaces. The pH of the solution is selected to electrostatically repel charged slurry particles from the copper surface.

Cleaning method using ammonium persulphate to remove slurry particles

A method and apparatus for minimizing excess aluminum deposition that can build up inside a substrate processing chamber during an aluminum CVD substrate processing operation. The method of the present invention periodically introduces nitrogen into the processing chamber after aluminum CVD processing of at least a single wafer in order to minimize unwanted aluminum accumulation in various parts of the chamber. According to one embodiment, the present invention provides a method of minimizing excess metal deposition inside a substrate processing chamber after a substrate processing operation. The method includes the steps of introducing a nitrogen-containing passivating gas into a chamber after the substrate processing operation, and maintaining at least a portion of the chamber at a second temperature during the introducing step thereby reducing excess metal build up within the chamber. In preferred embodiments, the method is performed after removal of the substrate from the processing chamber. In other preferred embodiments, the second temperature ranges from about 200.degree.-300.degree. C.

Growing community of inventors

Sunnyvale, CA, United States of America

Dashun Steve Zhou