Texas Instruments Corporation

Daryl Hiser

Stephen James Sanchez

A method and circuit for trimming a current source packaged with a device can facilitate trimming of the current source without the need for additional pins or dual function pins, resulting in improved accuracy and/or simplified trimming techniques. An exemplary packaged device is configured with a trimming circuit comprising a current trimming network and a coupling circuit. An exemplary packaged device can comprise any op amp, current or voltage reference, and/or sensor device, and is configured with one or more monitor inputs. An exemplary current trimming network comprises a variable current source and a reference current source, wherein a magnitude of the variable current source can be compared to the magnitude of the reference current source. An exemplary coupling circuit is coupled between the current trimming network and the device and is configured for enabling and disabling connection of an output of the current trimming network and a monitor input of the device. During an exemplary trimming method, the variable current source is configured with a magnitude adjusted to a desired proportion of a magnitude of the reference current source, with the current trimming network configured to produce a current proportional to the difference, sum, or product of the first and second current sources.

Method and circuit for trimming a current source in a package

Parametric testing of an integrated circuit chip includes pressing first, second, and third contact elements (PRB-) against first, second and third terminals (P), respectively, of the integrated circuit and forcing first, second, and third reference currents (Iref) through first, second, and third circuit paths each including a corresponding ESD diode. Each path includes two of the contact elements, two associated contact resistances, and one of the ESD diodes. First, second, and third voltages (Vm) are measured across the three circuit paths. Three equations representative of the three voltages are simultaneously solved to determine three contact resistances between the various contact elements and integrated circuit terminals. The voltages across the three contact resistances are computed by multiplying them by parametric test currents and are added to or subtracted from measured voltages of the contact elements to obtain accurate values of voltages of the integrated circuit terminals.

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Tucson, AZ, United States of America

Daryl Hiser