Freescale Semiconductor,inc.

Nxp Usa, Inc.

Other

Motorola Corporation

Darrel R Frear

Jinbang Tang

Stephen Ryan Hooper

Marc Alan Mangrum

Kenneth R Burch

Norman Lee Owens

Jong-Kai Lin

Lawrence N Herr

Robert E Booth

John M Pigott

Scott M Hayes

Randall C Gray

Shun-Meen Kuo

Elie A Maalouf

William H Lytle

Douglas G Mitchell

William G McDonald

Robert Joseph Wenzel

Fred T Brauchler

Dwight Lee Daniels

Akhilesh Kumar Singh

Carl Emil D'Acosta

Neil T Tracht

Vivek Gupta

Tien Yu T Lee

James R Griffiths

Jian Wen

William C Stermer, Jr

Thomas Cobb Speight

Lizabeth Ann A Keser

A differential pressure sensor assembly includes a transducer having a first sensing surface and a second sensing surface. The second sensing surface is contained in a cavity. An Integrated Circuit (IC) is hermetically coupled to the transducer. The IC has a first aperture aligned to the cavity. A lead frame is coupled to the IC. The lead frame has a second aperture aligned to the first aperture of the IC. A package encapsulates the transducer, the IC and the lead frame. The package has a third aperture exposed to the first sensing surface. The package includes a molding compound providing a hermetic seal between the third aperture of the package and the first aperture of the IC. The molding compound is separated from the transducer by an encroachment distance.

Differential pressure sensor assembly

A device in which an electronic circuit positioned within a cavity of a package housing is encased by a bubble restrictor material, with a media resistant material overlaying the bubble restrictor material. The bubble restrictor material functions to inhibit the formation and growth of moisture-related bubbles within the material, including at the interfaces of the material and surfaces within the package housing. The media resistant material is resistant to physical and chemical alterations by media within an external environment to which the device is exposed. The media resistant material and bubble resistant material function to transfer a sensed characteristic of the media to the electronic circuit.

Environmental sensor structure

Embodiments include devices and methods of their manufacture. A device embodiment includes a package housing, at least one electronic circuit (e.g., a sensor circuit), a first material, and a second material. The package housing includes a cavity that is partially defined by a cavity bottom surface, and the cavity bottom surface includes a mounting area and a non-mounting area. The at least one electronic circuit is attached to the cavity bottom surface over the mounting area. The first material has a relatively high, first modulus of elasticity, and covers the non-mounting area. The second material has a relatively low, second modulus of elasticity, and is disposed over the first material within the cavity.

Electronic devices with cavity-type, permeable material filled packages, and methods of their manufacture

Embodiments of inductive communication devices include first and second galvanically isolated IC die and a dielectric structure. Each IC die has a coil proximate to a first surface of the IC die. The IC die are arranged so that the first surfaces of the IC die face each other, and the first coil and the second coil are aligned across a gap between the first and second IC die. The dielectric structure is positioned within the gap directly between the first and second coils, and a plurality of conductive structures are positioned in or on the dielectric structure and electrically coupled with the second IC die. The conductive structures include portions configured to function as bond pads, and the bond pads may be coupled to package leads using wirebonds. During operation, signals are conveyed between the IC die through inductive coupling between the coils.

Die-to-die inductive communication devices and methods

A semiconductor device lead frame having enhanced mold locking features is provided. The lead frame has a flag with bendable edge features along the edge of the flag. Each edge feature is shaped to resist movement against encapsulating mold material in a plane of the edge feature. By bending a portion of the edge feature, improved mold locking of the flag is provided in multiple planes.

Lead frame having a flag with in-plane and out-of-plane mold locking features

An integrated circuit assembly includes a panel including an semiconductor device at least partially surrounded by an encapsulant. A panel upper surface and a device active surface are substantially coplanar. The assembly further includes one or more interconnect layers overlying the panel upper surface. Each of the interconnect layers includes an insulating film having contacts formed therein an interconnect metallization formed thereon. A lower surface of the panel is substantially coplanar with either a backside of the device or a lower surface of a thermally and electrically conductive slab that has an upper surface in thermal contact with the device backside. The assembly may also include a set of panel vias. The panel vias are thermally and electrically conductive conduits extending through the panel between the interconnect layer and suitable for bonding with a land grid array (LGA) or other contact structure of an underlying circuit board.

Redistributed chip packaging with thermal contact to device backside

Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure.

Method of making an integrated circuit package with shielding via ring structure

An integrated conformal electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules (-) to a process carrier () using a double side adhesive tape (), and then sequentially depositing an insulating layer () and a conductive shielding layer () before encapsulating the modules with a molding compound (). After removing the adhesive tape () to expose a surface of the encapsulated modules, a multi-layer circuit substrate () is formed over the exposed surface, where the circuit substrate includes shielding via structures (-) that are aligned with and electrically connected to the conductive shielding layer (), thereby encircling and shielding the circuit module(s).

Integrated conformal shielding method and process using redistributed chip packaging

A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described.

Method for forming a packaged semiconductor device

A disclosed integrated circuit (IC) module includes an IC panel and multi level circuit structure, referred to as an IPD structure, overlying an upper surface of the IC panel. The IC panel includes an electrically conductive embedded ground plane (EGP), an integrated circuit (IC) die, and an encapsulating material. The EGP is a substantially planar structure that includes or defines a plurality of cavities. The EGP may include or define an IC cavity and an IPD cavity. The IC die may be positioned within the IC cavity such that a perimeter of the IC cavity surrounds the IC die. The IPD structure may define or include a passive device such as an inductor. The passive device may be positioned or located overlying the void in the EGP.

Integrated circuit module with integrated passive device

Electromagnetic shield formation for integrated circuit die package

In one embodiment of the invention, a semiconductor component includes: a leadframe () having a surface (); an integrated passive component () located above the surface of the leadframe; a semiconductor chip () electrically coupled to the integrated passive component and located above the surface of the leadframe; and a mold compound () disposed around the semiconductor chip, the integrated passive component, and the leadframe. A portion () of the leadframe is exposed outside of the mold compound. The integrated passive component comprises a passive device (). A direction () perpendicular to the surface of the leadframe is a vertical direction, and the semiconductor chip, the integrated passive component, and the leadframe are arranged vertically with respect to each other.

Semiconductor component comprising leadframe, semiconductor chip and integrated passive component in vertical relationship to each other

An electronic component includes a substrate ( ), a device ( ) supported by the substrate and including a first bond pad ( ), and a cap ( ) overlying the substrate. The cap includes a second bond pad ( ) at an outside surface of the cap, a third bond pad ( ) at an inside surface of the cap and electrically coupled to the first bond pad, and an electrically conductive via ( ) extending through the cap and electrically coupling together the second and third bond pads.

Growing community of inventors

Phoenix, AZ, United States of America

Darrel R Frear