Semiconductor Components Industries, LLC

Cadence Design Systems, Inc.

Dariusz Piotr Palubiak

Ivan Koudar

Brian Patrick McGarvey

Steven John Buckley

Salvatore Gnecchi

Jan Ledvina

Patrick Murphy

Vitali Karasenko

Joe Canning

Cornelius O'Shea

Embodiments include herein are directed towards various circuit topologies. A self-correcting latch circuit may include a plurality of memory loops, a plurality of clock inputs, a plurality of data inputs, and a plurality of outputs. Each of the plurality of memory loops may be configured to store data in parallel.

Self-correcting circuitry

An imaging system may include a silicon photomultiplier with single-photon avalanche diodes (SPADs). The imaging system may be a LIDAR imaging system with LIDAR processing circuitry. To reduce memory requirements in the LIDAR processing circuitry, a dynamic resolution storage scheme may be used. The LIDAR processing circuitry may include autonomous dynamic resolution circuitry that receives input from a time-to-digital converter (TDC). The autonomous dynamic resolution circuitry may include a plurality of memory banks having different resolutions. Based on the magnitude of the input from the TDC, an appropriate memory bank may be selected. In parallel, an address encoder may select a memory bin based on the input from the TDC.

LIDAR system with dynamic resolution

A light detection and ranging (LIDAR) system may include a laser and a plurality of single photon avalanche diodes (SPADs) that are triggered by laser light that reflects off a target scene. The LIDAR system may be operated in a global shutter mode, so each of the SPADs may include its own time-to-digital conversion circuitry. To reduce the area required to implement the circuitry for each diode, the circuitry may be operated using cyclic histogramming, in which a first bit of a time-of-flight value may be determined using a first time period that corresponds to the emission of the laser light and the detection by the SPADs, a second bit of the time-of-flight value may be determined using a second time period that is half of the first time period, etc. In this way, the circuitry may accurately determine the signal peak while requiring less area and memory requirements.

Lidar systems with improved time-to-digital conversion circuitry

An imaging device may include single-photon avalanche diodes (SPADs). Positioning SPADs close together in an imaging device (such as a silicon photomultiplier) may have benefits such as improved sensitivity. However, as the SPADs get closer together, the SPADS may become susceptible to crosstalk. Crosstalk is typically undesirable due to reduced dynamic range and reduced signal accuracy. To reduce crosstalk, a capacitor or other component may be coupled between adjacent SPADs. When an avalanche occurs on a given SPAD, the bias voltage may drop below the breakdown voltage. The capacitor may cause a corresponding voltage drop on a neighboring SPAD. The voltage drop on the neighboring SPAD reduces the over-bias of that SPAD, reducing the sensitivity of the SPAD and therefore mitigating the chance of crosstalk occurring.

Imaging devices with capacitively coupled single-photon avalanche diodes

A semiconductor device may include a plurality of single-photon avalanche diodes (SPADs). The semiconductor device may include sensing single-photon avalanche diodes that are sensitive to incident light and dark single-photon avalanche diodes that are shielded from incident light. The dark single-photon avalanche diodes may be used to measure one or more parameters for the semiconductor device such as breakdown voltage, dark count rate, and quench resistance. Processing circuitry may optimize a bias voltage for the semiconductor device based on information regarding one or more sensor parameters obtained using the dark single-photon avalanche diodes.

System with a SPAD-based semiconductor device having dark pixels for monitoring sensor parameters

A semiconductor device may include an array of single-photon avalanche diode pixels. The single-photon avalanche diode (SPAD) pixels may include a SPAD coupled to a supply voltage terminal via first and second reset paths. The first reset path may be a fast reset path that provides the SPAD with a short recovery time. The second reset path may be a slower reset path that provides the SPAD with a longer recovery time, but is used to ensure the SPAD is quenched even when the quench resistance associated with the first reset path is low. Logic circuitry may selectively activate the first or the second resets to quench and reset the SPAD. A SPAD pixel may also include one or more switches that keep nodes in the SPAD pixel at a constant voltage when the SPAD pixel is inactive.

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Dariusz Piotr Palubiak