Stmicroelectronics S.r.l.

Consiglio Nazionale Delle Ricerche

Dario Salinas

Angelo Magri′

Sebastiano Ravesi

Cateno Marco Camalleri

Giovanni Abagnale

Guglielmo Fortunato

Luigi Mariucci

Ferruccio Frisina

Giuseppe Ferla

Massimo Cuscuna

Massimo Cuscuna′

A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.

Process for manufacturing a large-scale integration MOS device and corresponding MOS device

An embodiment of a process for forming an interface between a silicon carbide (SiC) layer and a silicon oxide (SiO) layer of a structure designed to conduct current is disclosed. A first epitaxial layer having a first doping level is homo-epitaxially grown on a substrate. The homo-epitaxial growth is preceded by growing, on the first epitaxial layer, a second epitaxial layer having a second doping level higher than the first doping level. Finally, the second epitaxial layer is oxidized so as to be totally removed. Thereby, a silicon oxide layer of high quality is formed, and the interface between the second epitaxial layer and silicon oxide has a low trap density.

Process for forming an interface between silicon carbide and silicon oxide with low density of states

A MOS power device having: a body; gate regions on top of the body and delimiting therebetween a window; a body region, extending in the body underneath the window; a source region, extending inside the body region throughout the width of the window; body contact regions, extending through the source region up to the body region; source contact regions, extending inside the source region, at the sides of the body contact regions; a dielectric region on top of the source region; openings traversing the dielectric region on top of the body and source contact regions; and a metal region extending above the dielectric region and through the first and second openings.

MOS power device with high integration density and manufacturing process thereof

Growing community of inventors

Catania, Italy

Dario Salinas