Ningbo University

Daohui Gong

Pengjun Wang

Huihong Zhang

Yaopeng Kang

Qian Wang

Yuejun Zhang

Weiwei Chen

Keji Zhou

A ternary sense amplifier and an SRAM array realized by the ternary sense amplifier are provided. The ternary sense amplifier comprises the 1CNFET transistor, the 2CNFET transistor, the 3CNFET transistor, the 4CNFET transistor, the 5CNFET transistor, the 6CNFET transistor, the 7CNFET transistor, the 8CNFET transistor, the 9CNFET transistor, the 10CNFET transistor, the 11CNFET transistor, the 12CNFET transistor and the 13CNFET transistor; the SRAM array comprises a ternary sense amplifier, a ternary memory array, the 1inverter, the 2inverter, the 3inverter, the 4inverter, the 14CNFET transistor, the 15CNFET transistor, the 16CNFET transistor, the 17CNFET transistor, the 18CNFET transistor and the 19CNFET transistor; it features in low power consumption, less postponement and high yield of chips.

Ternary sense amplifier and SRAM array realized by the ternary sense amplifier

The present invention discloses a CNFET double-edge pulse JKL flip-flop, comprising a double-edge pulse signal generator, 31 CNFET tubes, 6 NTI gate circuits having the same circuit structure, 6 PTI gate circuits having the same circuit structure as well as the 1and 2two-value inverters having the same circuit structure; it features in correct logic functions as well as high-speed and low power consumption.

CNFET double-edge pulse JKL flip-flop

The present invention discloses a ternary 2-9 line address decoder realized by CNFET, comprising two ternary 1-3 line address decoders of the same structure, nine three-input NAND gates of the same structure and nine inverters of the same structure; the ternary 1-3 line address decoder comprises a 1CNFET transistor, a 2CNFET transistor, a 3CNFET transistor, a 4CNFET transistor, a 5CNFET transistor, a 6CNFET transistor, a 7CNFET transistor, an 8CNFET transistor, a 9CNFET transistor, a 10CNFET transistor and an 11CNFET transistor; as compared with a 3-8 line address decoder, it features in limited deviation to an output terminals and significant reduction in the number of input terminals, which can minimize the number of ports as packaging, and improve decoding efficiency; furthermore, it is realized by CNFET, which features in low power consumption and less postponement.

Ternary 2-9 line address decoder realized by CNFET

The present invention discloses a ternary PUF unit and circuit realized by CNFET; the ternary PUF circuit comprises a ternary row decoder, a ternary column decoder, a ternary output circuit and a ternary PUF unit array; the said ternary PUF circuit is arranged into a 3rows&#xd7;3columns matrix formed by 3&#xd7;3ternary PUF units; the ternary PUF unit comprises a 1CNFET transistor, a 2CNFET transistor, a 3CNFET transistor, a 4CNFET transistor, a 5CNFET transistor, a 6CNFET transistor, a 7CNFET transistor, an 8CNFET transistor, a 9CNFET transistor and a 10CNFET transistor; its advantage lies in the fact that it is provided with small circuit area and higher randomness and uniqueness while ensuring proper logic function.

Ternary PUF unit and circuit realized by CNFET

The present invention discloses a replica bit-line circuit, comprising a replica unit, the 1inverter, the 2inverter, the 3inverter, the 4inverter, the 5inverter, the 6inverter, the 7inverter, the 8inverter, the 9inverter, the 1NAND gate, the 2NAND gate, the 3NAND gate, the 1NOR gate, the 2NOR gate and the 1PMOS tube; the 2NOR gate is provided with the 1input terminal, the 2input terminal, a set terminal and an output terminal; advantages of the present invention are stated as follows: It can inhibit feedback oscillation incurred by replica bit-line and replica wordline signal to obtain accurate wordline control signal; it can save switching power consumption of memory array by 53.7% under the power voltage of 1.2V.

Replica bit-line control circuit

A CNFET based pulse generator, including a first Carbon Nanotube Field Effect Transistor (CNFET), a second CNFET, a third CNFET, a fourth CNFET, a fifth CNFET, a sixth CNFET, a seventh CNFET, an eighth CNFET, a ninth CNFET, a tenth CNFET, an eleventh CNFET, a twelfth CNFET, a thirteenth CNFET, and a fourteenth CNFET. The first CNFET, the third CNFET, the fifth CNFET, the seventh CNFET, the tenth CNFET, the twelfth CNFET, and the thirteenth CNFET are P-type CNFETs. The second CNFET, the fourth CNFET, the sixth CNFET, the eighth CNFET, the ninth CNFET, the eleventh CNFET, and the fourteenth CNFET are N-type CNFETs.

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Zhejiang, China

Daohui Gong