Cisco Technology, Inc.

Valo, Inc.

Altera Corporation

Tabula, Inc.

Danny Thom

Soren Pedersen

Steven L Teig

Brad Hutchings

Kenneth M Buckland

Riccardo G Dorbolo

Barry W Field

Thomas A Potter

Marc A Miller

Radimir Shilshtut

Sina Soltani

Jan C Hobbel

Charles R Dyer

Jason Rupert Redgrave

Earl B Manchester

Manish Lohani

Lauren Trevor May

Some embodiments provide an integrated circuit ('IC') with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.

Integrated circuit (IC) with primary and secondary networks and device containing such an IC

Methods, apparatuses and systems facilitating the aggregation or bonding of communications paths into a higher-bandwidth, logical communications path. Embodiments of the present invention can be applied to bond different physical links (e.g., xDSL over twisted pairs), different channels on the same physical line, or even different channels or frequencies in a wireless communications network. The present invention further provides methods, apparatuses and systems facilitating the re-sequencing of data flows transmitted across bonded communications paths. In one embodiment, the re-sequencing methodology of the present invention adapts to the transmission delays (both absolute and relative) across the bonded communications path.

Methods, apparatuses and systems facilitating data transmission across bonded communications paths

Methods, apparatuses and systems facilitating the aggregation or bonding of physical communications links into higher-bandwidth logical links. A novel link bonding and encapsulation protocol scheme that optimizes the efficiency of data transfer across the physical links, while still allowing for desired Quality of Service (QoS) levels to high-priority traffic, such as voice data, with low delay requirements. Data streams are divided and concurrently transported over multiple physical links that are aggregated or bonded together to form one logical link. At the receive end, the original cell streams are recovered from the bonded logical links. In one embodiment, the physical links are xDSL links transmitting and receiving signals via conventional copper twisted-pair cabling. In one embodiment, the present invention allows telecommunications service providers to leverage their investments in existing twisted pair connection technologies to deliver high-bandwidth services to customers in a fast and cost-efficient manner.

Methods, apparatuses and systems facilitating aggregation of physical links into logical link

A rate adjustable backplane includes a set of switch slots configured to receive one or more switch cards forming a switch core and a plurality of line slots each configured to receive a line card. A low speed bus couples the line slots to the set of switch slots. A high speed bus also couples the line slots to the set of switch slots. Each line slot includes a low speed connector coupled to the low speed bus and a high speed connector coupled to the high speed bus. The low speed connector is adapted to receive a mating connector of a line card to establish a low speed communication connection between the line card and the switch core. The high speed connector is adapted to receive a mating connector of the line card to establish a high speed link between the line card and the switch core.

Rate adjustable backplane and method for a telecommunications node

A switch card for telecommunications node includes a shared memory operable to store traffic channels. A time slot interchanger (TSI) is coupled to a first bus and to the shared memory. The TSI is operable based on predefined switching instructions to access the shared memory to stored traffic channels received from the first bus and to retrieve traffic channels for transmission on the first bus. An asynchronous transfer mode (ATM) switch is operable to switch a traffic cell based on header information in the traffic cell. A traffic converter is operable to convert traffic channels retrieved from the shared memory to traffic cells for processing by a bus fuser and to convert traffic cells to traffic channels for storage in the shared memory. The bus fuser is coupled to the shared memory through the traffic converter, the ATM switch, and a second bus. The bus fuser is operable to receive a traffic cell from each one of the traffic converter, the ATM switch, and the second bus and to route the traffic cell to another one of the traffic converter, the ATM switch, and the second bus.

Fused switch core and method for a telecommunications node

Growing community of inventors

Santa Rosa, CA, United States of America

Danny Thom