Altera Corporation

Danny Biran

Chooi Pei Lim

Jordan Plofsky

Francis Man-Chit Chow

A mask set is described. In one implementation, the mask set includes: a first plurality of base layer masks, where each base layer mask of the first plurality of base layer masks includes a plurality of base layer tiles of a first tile size; a first plurality of top layer masks, where each top layer mask of the first plurality of top layer masks includes a plurality of first top layer tiles of the first tile size; and a second plurality of top layer masks, where each top layer mask of the second plurality of top layer masks includes a plurality of second top layer tiles of a second tile size; where the second tile size is different from the first tile size. Also, a method of fabricating a plurality of integrated circuits (ICs) is described.

Mask set for fabricating integrated circuits and method of fabricating integrated circuits

A mask set is described. In one implementation, the mask set includes: a first layer mask including a plurality of first tiles of a first tile size; and a second layer mask including a plurality of second tiles of a second tile size, where the second tile size is different from the first tile size. Also, a method of fabricating a plurality of integrated circuits (ICs) is described. In one implementation, the method includes: using a first layer mask having a first tile size to fabricate a first layer of a first IC of the plurality of ICs and a first layer of a second IC of the plurality of ICs; and using a second layer mask having a second tile size to fabricate a second layer of the first IC, where the second tile size is different from the first tile size.

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Cupertino, CA, United States of America

Danny Biran