Synopsys, Inc.

Daniel Zhang

Zongwu Tang

Juhwan Kim

Lawrence S Melvin, Iii

Subarnarekha Sinha

Weiping Fang

Hua Song

Alex Miloslavsky

Kent Y Kwang

Zong Wu Tang

Gang Huang

Haiqing Wei

Jingyu Xu

Yang-Shan Tong

Wei-Chih Tseng

Kevin A Beaudette

Linni Wei

One embodiment of the present invention provides a system that generates a pattern-clip-based hotspot database for performing automatic pattern-clip-based layout verification. During operation, the system receives a list of pattern clips which specify manufacturing hotspots to be avoided in a layout, wherein each pattern clip comprises a set of geometries in proximity to each other. Next, for each pattern clip, the system perturbs the pattern clip to determine a first range of variations for the constituent set of geometries wherein the perturbed pattern clip no longer causes a manufacturing hotspot. The system then extracts a set of correction guidance descriptions from the first range of variations for correcting the pattern clip. Subsequently, the system stores the pattern clip and the set of correction guidance descriptions in the pattern-clip-based hotspot database.

Pattern-clip-based hotspot database system for layout verification

One embodiment of the present invention provides a system that automatically processes manufacturing hotspot information. During operation, the system receives a pattern clip associated with a manufacturing hotspot in a layout, wherein the pattern clip comprises a set of polygons in proximity to the manufacturing hotspot's location. Next, the system determines if the pattern clip matches a known manufacturing hotspot configuration. If the pattern clip does not match a known manufacturing hotspot configuration, the system then performs a perturbation process on the pattern clip to determine a set of correction recommendations to eliminate the manufacturing hotspot. By performing the perturbation process, the system additionally determines ranges of perturbation to the set of polygons wherein the perturbed pattern clip does not eliminate the manufacturing hotspot. Subsequently, the system stores the set of correction recommendations and the ranges of perturbation into a manufacturing hotspot database.

Dual-purpose perturbation engine for automatically processing pattern-clip-based manufacturing hotspots

One embodiment of the present invention provides a system that verifies an integrated circuit (IC) chip layout. During operation, the system receives a layout of an IC chip after the layout has gone through a place-and-route operation. Next, the system performs a lithography compliance checking (LCC) operation on the layout to detect lithography hotspots within the layout, wherein each lithography hotspot is associated with a local routing pattern around the lithography hotspot. Next, for each detected lithography hotspot, the system compares the associated local routing pattern against a hotspot database to determine if the local routing pattern matches an entry in the hotspot database, which stores a set of known hotspot configurations. If so, the system corrects the lithography hotspot using correction guidance information associated with the hotspot configuration stored in the hotspot database. Otherwise, the system corrects the lithography hotspot by performing a local rip-up and reroute on the local routing pattern, iteratively, until achieving convergence or given number of iterations.

Method and system for post-routing lithography-hotspot correction of a layout

One embodiment provides a system for using a database to quickly identify a manufacturing problem area in a layout. During operation, the system receives a first check-figure which identifies a first area in a first layout, wherein the first area is associated with a first feature. Next, the system determines a first sample using the first check-figure, wherein the first sample represents the first layout's geometry within a first ambit of the first check-figure, wherein the first sample's geometry is expected to affect the shape of the first feature. The system then performs a model-based simulation using the first sample to obtain a first simulation-result which indicates whether the first feature is expected to have manufacturing problems. Next, the system stores the first simulation-result in a database which is used to quickly determine whether a second feature is expected to have manufacturing problems.

Method and apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout

A method for performing layout verification involves identifying feature centerlines in a mask layout, and then performing lithography simulation along the centerlines to generate a set of intensity distributions. At each local maxima or minima in the intensity distributions, further lithography simulation can be performed to determine an exposure pattern width at those local maxima/minima (check positions). The exposure pattern widths can then be evaluated to determine whether an actual pinch or bridge defect will be generated at those locations. If defect generation is likely (based on the lithographical simulation) at a particular location, the corresponding portion of the mask layout can be redesigned to avoid defect generation during actual production. In this method, accurate layout verification can be performed with a minimum of time-consuming lithography modeling.

Centerline-based pinch/bridge detection

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San Jose, CA, United States of America

Daniel Zhang