Semiconductor Manufacturing International (shanghai) Corporation

Shanghai Huahong Grace Semiconductor Manufacturing Corporation

Daniel Xu

Roger Lee

Ernest Li

A silicon-on-insulator radio frequency device and a silicon-on-insulator substrate are provided. In the silicon-on-insulator radio frequency device, a pit is formed on a surface of a high resistivity silicon plate which is close to a buried oxide layer. The pit may be filled with an insulating material, thereby increasing an equivalent surface resistance of the high resistivity silicon plate; or no insulating material is filled into the pit, that is, the pit remains a vacuum state or is only filled with air, which can increase the equivalent surface resistance of the high resistivity silicon plate as well. In such, an eddy current generated on a surface of the high resistivity silicon plate under the action of a radio frequency signal may be reduced. As a result, loss of the radio frequency signal is reduced and the linearity of the radio frequency signal is improved.

Silicon-on-insulator radio frequency device and silicon-on-insulator substrate

A method for manufacturing Flash memory devices includes forming a well region in a substrate, depositing a gate dielectric layer overlying the well region, and depositing a first polysilicon layer overlying the gate dielectric layer. The method also includes depositing a dielectric layer overlying the first polysilicon layer and depositing a second polysilicon layer overlying the dielectric layer to form a stack layer. The method simultaneously patterns the stack layer to form a first flash memory cell, which includes a first portion of the second polysilicon layer overlying a first portion of the dielectric layer overlying a first portion of first polysilicon layer and to form a select device, which includes a second portion of second polysilicon layer overlying a second portion of dielectric layer overlying a second portion of first polysilicon layer. The method further includes forming source/drain regions using ion implant. The select device is activated by applying voltage to the second portion of first polysilicon layer.

Array architecture for embedded flash memory devices

An anti-fuse apparatus includes a substrate of a first conductivity type and a well region of a second conductivity type formed in the substrate. A junction between the well region and the substrate is characterized by a breakdown voltage higher than a predetermined voltage. The apparatus includes a contact region of the second conductivity type within the well region. The apparatus also includes a channel region and a drain region within the substrate. A gate dielectric layer overlies the channel region and the contact region. A first polysilicon gate, the drain region, and the well region are associated with an MOS transistor. The apparatus also includes a second polysilicon gate overlying the gate dielectric layer which overlies the contact region. The contact region is configured to receive a first supply voltage and the second polysilicon gate is configured to receive a second supply voltage.

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Shanghai, China

Daniel Xu