At&t Bell Laboratories

American Telephone & Telegraph Co., At&t Bell Laboratories

At&t Information Systems Inc.

Daniel V Peters

Hanz Werner Herrig

Randy D Pfeifer

David N Horn

Wayne R Wilcox

In a multiprocessor system (FIG. 1), the processors (10-12) are interconnected by a non-blocking communication medium such as a crossbar switch (19). Each processor is connected to a dedicated port circuit (18) at the switch by an optical link (16). Each port circuit is connected to the crossbar switch by an electrical link (20). The port circuits are interconnected by a contention medium (14). A port circuit sends an access request by its connected processor to the destination processor over the contention medium. Circuitry (205) at each port circuit receives requests, for access to the connected processor, prioritizes conflicting requests, and grants them sequentially. The circuitry interleaves grants of access to the connected processor with grants of outgoing access requests made by the connected processor. The circuitry grants an access request by causing the crossbar switch to establish the corresponding connection.

Multiprocessor interconnection and access arbitration arrangement

An electronic circuit board electrically connected to other circuits of a data processing system by means of a bus, may be removed and re-inserted in the system without the necessity of disabling other circuits connected to the bus. A latch actuated switch provides a control signal in anticipation of circuit board removal. The control signal activates a finite state machine which seizes control of the bus after completion of any current bus communications and stops the generation of clock pulses normally required in bus communications. When contact is physically broken between the board and its corresponding connector, the finite state machine restores the bus clock pulses and relinquishes control of the bus. When a board is to be inserted in an open connector, contact between the board and the connector is sensed by the finite state machine which causes the bus to be seized and the bus clock pulses to be temporarily inhibited. When the board is fully inserted, the finite state machine restores the bus clock pulses and relinquishes control of the bus.

Method and apparatus for controlled removal and insertion of circuit

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Warrenville, IL, United States of America

Daniel V Peters