Technion Research & Development Foundation Ltd

Daniel Soudry

Shahar Kvatinsky

Dotan Di Castro

Avinoam Kolodny

Ran El-Yaniv

Itay Hubara

Asaf Gal

Tzofnat Greenberg

A stochastic synapse for use in a neural network, comprising: first and second magnetic tunnel junction (MTJ) devices, each MTJ device having a fixed layer port and a free layer port; a first and second control circuit, each connected respectively to the free layer port of the first and second MTJ devices, wherein the fixed layer ports of the first and second MTJ devices are connected to each other; wherein the first and second control circuits are configured to perform a gated XNOR operation between synapse and activation values; and wherein an output of the gated XNOR is represented by the output current through both of the first and second MTJ devices.

MTJ-based hardware synapse implementation for binary and ternary deep neural networks

Training neural networks by constructing a neural network model having neurons each associated with a quantized activation function adapted to output a quantized activation value. The neurons are arranged in layers and connected by connections associated quantized connection weight functions adapted to output quantized connection weight values. During a training process a plurality of weight gradients are calculated during backpropagation sub-processes by computing neuron gradients, each of an output of a respective the quantized activation function in one layer with respect to an input of the respective quantized activation function. Each neuron gradient is calculated such that when an absolute value of the input is smaller than a positive constant threshold value, the respective neuron gradient is set as a positive constant output value and when the absolute value of the input is smaller than the positive constant threshold value the neuron gradient is set to zero.

Quantized neural network training and inference

A device, comprising: an array of cells, wherein the cells are arranged in columns and rows; wherein each cell comprises a memristive device; an interfacing circuit that is coupled to each cell of the array of cells; wherein the interfacing circuit is arranged to: receive or generate first variables and second variables; generate memristive device input signals that once provided to memristive devices of the array will cause a change in a state variable of each of the memristive devices of the cells of the array, wherein the change in the state variable of each of the memristive devices of the cells of array reflects a product of one of the first variables and one of the second variables; provide the memristive device input signals to memristive devices of the array; and receive output signals that are a function of at least products of the first variables and the second variables.

Analog multiplier using a memristive device and method for implemening Hebbian learning rules using memrisor arrays

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Haifa, Israel

Daniel Soudry