Microsoft Technology Licensing, LLC

Other

Daniel Sebastian Berger

Lisa Ru-feng Hsu

Ishwar Agarwal

Alastair Wolman

Stefan Saroiu

Srikanth Kandula

Monish Shantilal Shah

Vishal Soni

Behnaz Arzani

Tsu-wang Hsieh

Janaina Barreiro Gambaro Bueno

Pooria Namyar

Aninda Manocha

Daniel Stopol Crankshaw

Yevgeniy Bak

Emily Nicole Wilson

Kevin Michael Broas

Brett Kenneth Dodds

Stanko Novakovic

John A Strange

Ramakoti R Bhimanadhuni

Lisa Ru-Feng Hsu

Peter Hanpeng Jiang

Pallavi Baral

Bhuvan Malladihalli Shashidhara

Christina Margaret Tobias

Charlotte Gauchet

Jasmine Grace Schlichting

Michael Wayne Stephenson

Farah Farzana

Sebastien Nathan R Levy

Josh Charles Moore

Ahu Oral

Arhatha Bramhanand

Juan Arturo Herrera Ortiz

The disclosure herein describes training and using an uncorrectable error (UE) state prediction model based on telemetry error data. Sets of UE state labels and non-UE state labels are generated from a first set of collected telemetry data, wherein the UE state labels each reference a UE and telemetry data of an interval prior to the referenced UE. Statistical features are extracted from telemetry data of the sets of UE state labels and non-UE state labels, and the extracted statistical features are used to train a UE state prediction model. A second set of collected telemetry data is obtained, and a UE event is predicted based on the second set of collected telemetry data using the trained UE state prediction model. A preventative operation is performed on a memory page of the system based on the predicted UE event, whereby the predicted UE event is prevented from occurring.

Training and using a memory failure prediction model

A device calculates a memory oversubscription threshold for a virtual machine (VM). Based on the memory oversubscription threshold, the device determines a first memory size to be physically allocated to the VM, and a second memory size to be oversubscribed to the VM. The device configures a first virtual non-uniform memory access (NUMA) node comprising a virtual processor and a first virtual memory having the first memory size. The device allocates a first physical memory to back the first virtual memory. The device configures a second virtual NUMA node comprising a second virtual memory having the second memory size. The second virtual NUMA node is a computeless NUMA node. The device configures the VM to use the first virtual NUMA node and the second virtual NUMA node. Based on the second virtual NUMA node being computeless, the VM funnels a memory access to the first virtual memory.

Using virtual non-uniform memory access nodes to funnel virtual machine memory accesses

The present disclosure relates to systems and methods implemented on a memory controller for detecting and mitigating memory attacks (e.g., row hammer attacks). For example, a memory controller may engage a counting mode in which activation counts for memory sub-banks are tracked. For example, a memory controller may engage a counting mode in which activation counts for memory rows of memory sub-banks are maintained. Under certain conditions, the memory controller may transition from the counting mode to a sampling mode to mitigate potential row hammer attacks. The memory controller may consider various conditions in determining whether to continue detecting and mitigating potential row hammer attacks in the sampling mode and/or transitioning back to the counting mode. By selectively transitioning between the different operating modes, the memory controller may reduce periods of time when the memory hardware is vulnerable to attacks.

Detecting and mitigating memory attacks

The present disclosure relates to systems and methods implemented on a memory controller for detecting and mitigating memory attacks (e.g., row hammer attacks). For example, a memory controller may track activations of row addresses within a memory hardware (e.g., a DRAM device) and determine whether a pattern of activations is indicative of a row hammer attack. This is determined using a counting mode for corresponding memory sub-banks. Where a likely row hammer attack is detected, the memory controller may activate a sampling mode (rather than the counting mode) for a particular sub-bank to identify which of the row addresses should be refreshed on the memory hardware. The implementations described herein provide a low computational cost alternative to heavy-handed detection mechanisms that require access to significant computing resources to accurately detect and mitigate row hammer attacks.

A computing system identifies mitigation actions in response to failures within a computer network. A service level objective is obtained by the computing system for client-resource data flows traversing the computer network between client-side and resource-side nodes. Indication of a failure event at a network location of the computer network is obtained. For each mitigation action of a set of candidate mitigation actions, an estimated impact to a distribution of the service level objective is determined for the mitigation action by applying simulated client-resource data flows to a network topology model of the computer network in combination with the mitigation action and the failure event. One or more target mitigation actions are identified by the computing system from the set of candidate mitigation actions based on a comparison of the estimated impacts of the set of candidate mitigation actions.

Impact-aware mitigation for computer networks

The present disclosure relates to systems, methods, and computer-readable media for tracking memory usage data on a memory controller system and providing a mechanism whereby one or multiple accessing agents (e.g., computing nodes, applications, virtual machines) can access memory usage data for a memory resource managed by a memory controller. Indeed, the systems described herein facilitate generation of and access to heatmaps having memory usage data thereon. The systems described herein describe features and functionality related to generating and maintaining the heatmaps as well as providing access to the heatmaps to a variety of accessing agents. This memory tracking and accessing is performed using low processing overhead while providing useful information to accessing agents in connection with memory resources managed by a memory controller.

Managing and ranking memory resources

Methods and systems related to memory reduction in a system by oversubscribing physical memory shared among compute entities are provided. A portion of the memory includes a combination of a portion of a first physical memory of a first type and a logical pooled memory associated with the system. A logical pooled memory controller is configured to: (1) track both a status of whether a page of the logical pooled memory allocated to any of the plurality of compute entities is a known-pattern page and a relationship between logical memory addresses and physical memory addresses associated with any allocated logical pooled memory, and (2) allow the write operation to write data to any available space in the second physical memory of the first type only up to an extent of physical memory that corresponds to the portion of the logical pooled memory previously allocated to the compute entity.

Memory reduction in a system by oversubscribing physical memory shared by compute entities supported by the system

A sunlight simulator includes an elongated, cylindrical housing, an artifical light source disposed along the longitudinal axis thereof, and a plurality of light collecting subassemblies equidistantly spaced radially from and around the light source. The light source is of a type that emits a substantial amount of radiation in the UV portion of the spectrum. The light collecting subassemblies provide a plurality of individually and selectively adjustable beams of UV radiation. A plurality of light guides are provided for directing the radiation to desired locations.

Sunlight simulator

Growing community of inventors

Seattle, WA, United States of America

Daniel Sebastian Berger