Maxim Integrated Products, Inc.

Bfly Operations, Inc.

Daniel Rea McMahill

Nevada J Sanchez

Kailiang Chen

Keith Glen Fife

Jungwook Yang

Joseph Lutsky

Ajay Kuckreja

Circuitry for an ultrasound device is described. The ultrasound device may include a symmetric switch positioned between a pulser and an ultrasound transducer. The pulser may produce bipolar pulses. The symmetric switch may selectively isolate a receiver from the pulser and the ultrasound transducer during a transmit mode of the device, when the bipolar pulses are provided by the pulser to the ultrasound transducer for transmission, and may selectively permit the receiver to receive signals from the ultrasound transducer during a receive mode. The symmetric switch may be provided with a well switch to remove well capacitances in a signal path of the device.

Symmetric receiver switch for ultrasound devices

Aspects of the technology described herein related to an ultrasound processing unit (UPU) including gray-coding circuitry configured to convert standard binary-coded digital ultrasound signals to gray-coded digital ultrasound signals and gray-decoding circuitry coupled to the gray-coding circuitry and configured to convert the gray-coded digital ultrasound signals to standard binary-coded digital ultrasound signals. The UPU may include an analog portion, a digital portion, and a data bus configured to route the gray-coded digital ultrasound signals from the analog portion to the digital portion subsequent to converting the standard binary-coded digital ultrasound signals to the gray-coded digital ultrasound signals. The analog portion may include multiple analog front-ends (AFEs), the gray-coding circuitry, and an analog-to-digital converter. The digital portion may include the gray-decoding circuitry. A data bus from one AFE may pass over another AFE.

Methods and apparatuses for processing ultrasound signals

A digital-to-analog converter (DAC) includes a first DAC core, a second DAC core, and a butterfly switch. The first DAC core generates a first output. The second DAC core generates a second output. The butterfly switch includes at least one of switch transistors and cascode transistors. The butterfly switch selectively connects the first output and the second output to an output stage of the DAC.

High speed digital-to-analog converter with low voltage device protection

In an embodiment, a current source having a piece-wise linear relationship between current and temperature is provided. The current source includes a first current source to provide current based on a first current-temperature relationship. The current source further includes a second current source coupled in parallel to the first current source. The second current source is to provide current based on a second current-temperature relationship. The current source further includes first mirroring circuitry to mirror a sum of the first current source and the second current source to an output current source. The current source also includes second mirroring circuitry to mirror the sum of the first current source and the second current source for comparison with a third current source. The third current source provides a minimum current magnitude and the third current source is coupled to the second current source to control output of the second current source.

Bias circuit with non-linear temperature characteristics

A method for providing dynamic element matching of capacitors in a pipelined analog to digital converter (ADC). Instead of randomizing the output of a flash ADC before providing the output of the ADC to the capacitor array, the threshold voltages from a reference ladder are randomized. This eliminates multiple, series connected switches of a randomizer between the output of a comparator bank and the capacitor array, and may be done during the time the output of the comparator bank of the flash ADC is latched, thereby not negatively impacting the speed of operation of the pipelined ADC.

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Woodstock, GA, United States of America

Daniel Rea McMahill