Sigmatel, Inc.

Austin IP Partners

Brooktree Corporation

Freescale Semiconductor,inc.

Other

Daniel Patrick Mulligan

Mathew A Rybicki

Marcus William May

Matthew Brady Henson

David Cureton Baker

Eric J Schell

Matthew Derrell Felder

Paul B Wood

Stephen G Glennon

Debby Gumto Clarke

A Light Emitting Diode (LED) light includes a bridge rectifier configured to be powered by an alternating current power source and to produce a rectified output. Control circuitry couples to the bridge rectifier and is configured to produce a shunt signal when the rectified output is less than a threshold voltage. A series connected Light Emitting Diode (LED) string includes a first group of LEDs and a second group of LEDs. A switch couples to a first side of the second group of LEDs and is controlled by the shunt signal to deactivate the second group of LEDs. The control circuitry may include a ratio metric series resistor string configured to sense a proportion of the rectified output and an inverter configured to generate the shunt signal based on the proportion of the rectified output.

Light emitting diode light structures

A method, apparatus, and computer program product for implementing a high-performance data storage device using block-access memory devices are disclosed. According to an embodiment of the present invention, a storage device includes a block-access memory device configured to stored data in one or more physical sector addresses and a random-access memory device storing a logical-to-physical (L2P) sector address translation data structure. Also, the storage device includes a device manager, coupled to both the block-access memory device and the random-access memory. The device manager is configured to determine a physical sector address in the block-access memory device, in response to a data access request, wherein the data access request includes a logical sector address by mapping the logical sector address to a physical sector address using the L2P sector address translation data structure.

System and method for implementing a high performance data storage system

A system and method operable to automatically disable input/output signal processing based on the required data format is provided. The need for an input/output module, such as an encoder, required to process input signal having a first data format (i.e. multimedia format) and produce an output signal having a second format (i.e. multimedia format) is determined. When the input/output module is not required to produce the output signal in the second format, the input/output module is disabled.

Automatically disabling input/output signal processing based on the required multimedia format

A method includes receiving payload data from a data source at error correction code (ECC) logic, where the ECC logic is adapted to process a block of data of a particular size via a plurality of stages. The ECC logic is initialized to a selected stage of the plurality of stages. The selected stage includes an initial value and an initial number of cycles. The initial value and the initial number of cycles are related to a number of symbols of padding data corresponding to a difference in size between the payload data and the block of data. The selected stage is related to a state of the ECC logic as if the number of symbols of padding data had already been processed by the ECC logic. The payload data is processed via the ECC logic beginning with the selected stage to produce parity data related to the payload data.

Error correction system and method

A processing system includes a processing module and a memory module for storing plurality of data. A controllable power source supplies a source voltage to the memory module in response to a target voltage. A controller module receives a temperature signal and adjusts the target voltage in response to the temperature signal.

Processing system and methods for use therewith

A method and system for utilizing multiple speakers in a portable electronic device is disclosed. The method includes receiving an input at a user interface of a portable electronic device, switching a first and second speaker in a stereo configuration to a mono configuration by routing a first digital to analog converter (DAC) output to both the first and second speaker in response to the input and coupling a third speaker to a second DAC to receive a first audio signal that is responsive to the input. The system includes a first digital to analog converter coupled to a first speaker, a second DAC coupled to a second speaker, and a third speaker. The system further includes switching logic coupled to the first and second DACs. The switching logic is responsive to an input signal provided by a user interface of a portable device. In response to an input signal from the user interface, the switching logic couples the first and second speakers to the first DAC and the third speaker to the second DAC.

System and method of routing audio signals to multiple speakers

A system-on-a-chip integrated circuit includes a multimedia module that produces rendered output data and a high-speed interface. A processing module generates output multimedia data in accordance with at least a portion of a multimedia application in response to input multimedia data received from either the multimedia module or the high-speed interface. The output multimedia data is provided to either the multimedia module or the high-speed interface. An on-chip DC-to-DC converter converts a battery voltage into a supply voltage that is coupled to the multimedia module, the high-speed interface, and/or the processing module.

System-on-a-chip for processing multimedia data and applications thereof

In some embodiments, a method for testing a memory having a plurality of bits is provided and includes initializing each value in a first register to zero. Next, each value in a second register is initialized to one. Further, each bit in the memory is initialized to zero. A logical OR operation is applied to each bit in the memory with a bit value as the first operand and a corresponding register value in the first register as the second operand. Additionally, the method includes initializing each bit in the memory to one. Also, a logical AND operation is applied to each bit in the memory with the bit value as the first operand and a corresponding register value as the second operand.

System and method for testing memory

A circuit for use by a multifunction handheld device is coupleable to an audio output device, the multifunction handheld device including a color video display device and a host interface that is coupleable to a host device. The circuit includes a processing module and a memory interface, operably coupled to a memory that stores a plurality of digitally formatted files, and that stores operational instructions that cause the processing module to receive a first digitally formatted file of the plurality of digitally formatted files from the host device when coupled to the host device via the host interface and store the first digitally formatted file in the memory, wherein the first digitally formatted file includes a compressed audio file; receive a second digitally formatted file of the plurality of digitally formatted files from a host device when coupled to the host device via a host interface and store the second digitally formatted file in the memory, wherein the second digitally formatted file includes a compressed video file; playback a selected one of the plurality of digitally formatted files, the playback including the generation of an audio output signal for the audio output device, when the first digitally formatted file is selected, and the playback including rendering the selected one of the digitally formatted files for the color video display device, when the second digitally formatted file is selected.

Growing community of inventors

Austin, TX, United States of America

Daniel Patrick Mulligan