International Business Machines Corporation

Other

Zimmer Gmbh

Bertin; Kim C.

Burke; Dennis W.

Daniel P O'Connor

Dennis W Burke

Gregory C Stalcup

Terry L Dietz

Kim C Bertin

Rodney L Bays

Richard D Vanlaningham

Rajesh Bhikhubhai Patel

Charles Hampton Perry

Herbert I Stoller

Ajay Prabhakar Giri

Paul Robert Walling

Sundar M Kamath

Lisa M Studzinski

John Ulrich Knickerbocker

David Clifford Long

Benjamin V Fasano

Richard Francis Indyk

Srinivasa S Reddy

Robert L Weiss

Steven E Dietzel

Edward R Pillai

Scott Ira Langenthal

Warren D Dyckman

Roger Lam

Gerald G Advocate, Jr

Peter D Van Dyke

Sundar Mangalore Kamath

Todd H Buley

Norman D Curry

Francis Krug

A masonry block system that employs blocks with unique surfaces, top, bottom, and transition, and a locking starter rail for placement below the block wall. The surfaces of the block and the shape of the starter rail are configured so as to lock together, providing a wall system. The system can either be mortarless wherein grout-like material is placed within the blocks to provide a monolithic system. A method of making and installing and various parts, such as the starter rail and block are also disclosed.

Stacking masonry block system with transition block and utility groove running therethrough

A masonry block system that employs blocks with unique surfaces, top and bottom, and a locking starter rail for placement below the block wall. The surfaces of the block and the shape of the starter rail are configured so as to lock together, providing a wall system. The system can either be mortarless wherein grout-like material is placed within the blocks to provide a monolithic system. A method of making and installing and various parts, such as the starter rail and block are also disclosed.

Stacking masonry block system with locking starter device

Disclosed is a method and structure for locally powering a semiconductor chip within a package. The structure and method incorporate a local voltage regulator mounted adjacent a semiconductor chip on a top surface of a carrier. The voltage regulator is electrically connected to a power plane disposed within the carrier. The voltage regulator continuously senses the reflected voltage of the power plane at a regulated output port and actively cancels time domain noise within its operational bandwidth. Mounting the voltage regulator on top of the carrier adjacent to the chip minimizes loop inductance between the regulator and power plane and also minimizes delay caused by impedance of the power plane on the current flowing to the chip.

In-module current source

A method of assembling an interconnect device assembly which consists of cylindrical resilient wire bundles captured within a carrier. In a step of the method, the interconnect device assembly is placed in a fixture and the ends of the resilient wire bundles are deformed by shaping dies in the fixture so that the resilient wire bundles now have a dog bone shape. The dog bone shape of the resilient wire bundles prevents the resilient wire bundles from being partially or totally dislodged during handling and transit.

Method of assembling an interconnect device assembly

A method in which an alignment tool consisting of a nest and guide tool is used to align an LGA module in the nest and then the LGA module is removed from the nest and aligned with a circuit card by the use of the guide tool.

Method of assembling a land grid array module

A multilayer ceramic semiconductor chip carrier is provided by a method of interconnecting ground, signal and power lines in a semiconductor chip carrier. The method involves forming a plurality of insulating layers with conductor lines comprising power and ground lines connected in parallel in a single plane formed in planes between the insulating layers. The parallel lines are directed in orthogonal directions in parallel between any two of the insulating layers with alternation successively between planes of X-directed lines and planes of Y-directed coplanar signal, power and ground lines. There are via connections formed between planes connecting a power line in one plane to another power line in another plane. Other via connections between planes connect a ground line in a first plane to another ground line in a second plane, and signal lines are formed in parallel between a ground line and a power line in a given plane.

Electrical and physical design integration method and apparatus for providing interconnections on first level ceramic chip carrier packages

A high performance TF-ceramic module for mounting integrated circuit chips thereto and a method of fabricating the module at reduced cost. The substrate includes thin film (TF) layers formed directly on a layered ceramic base. A first thick film wiring layer is formed on or embedded in a top surface of the thick film layered ceramic base using thick film techniques. A first dielectric layer of a polyimide or other organic material, or an insulating material different than the ceramic material is formed on top of the first wiring layer. The dielectric layer may be spun on or sprayed on and baked; vapor deposited; laminated to the ceramic base; or an inorganic layer may be deposited using plasma enhanced chemical vapor deposition (PECVD). Vias are formed through the first dielectric layer. A second wiring layer is formed on the first dielectric layer. A second dielectric layer is formed on the second wiring layer. At least one mounting location suitable for mounting an electronic component is formed on the second dielectric layer. The substrate may be attached a printed circuit board by direct attachment, pin grid array (PGA), land grid array (LGA), ball grid array (BGA), column grid array (CGA) and miniBGA on the bottom layer of the ceramic base.

Direct deposit thin film single/multi chip module

Disclosed is a multilayer ceramic substrate, and a method for forming same, which has an outer unsealed layer having a metallic via, an inner sealed layer having a composite via of metallic and ceramic materials and a further unsealed layer having a metallic via.

Ceramic substrate having a sealed layer

A high performance TF-ceramic module for mounting integrated circuit chips thereto and a method of fabricating the module at reduced cost. The substrate includes thin film (TF) layers formed directly on a layered ceramic base. A first thick film wiring layer is formed on or embedded in a top surface of the thick film layered ceramic base using thick film techniques. A first dielectric layer of a polyimide or other organic material, or an insulating material different than the ceramic material is formed on top of the first wiring layer. The dielectric layer may be spun on or sprayed on and baked; vapor deposited; laminated to the ceramic base; or an inorganic layer may be deposited using plasma enhanced chemical vapor deposition (PECVD). Vias are formed through the first dielectric layer. A second wiring layer is formed on the first dielectric layer. A second dielectric layer is formed on the second wiring layer. At least one mounting location suitable for mounting an electronic component is formed on the second dielectric layer. The substrate may be attached a printed circuit board by direct attachment, pin grid array (PGA), land grid array (LGA), ball arid array (BGA), column grid array (CGA) and miniBGA on the bottom layer of the ceramic base.

The milling instrumentation of this invention provides a milling guide connected to the femur for accommodating a milling device. The milling instrumentation includes an alignment guide which is used by the surgeon to set a femoral bracket or base on the medial and lateral sides of the exposed femur adjacent its distal end. Once the brackets are set, the alignment guide is removed and a milling guide is connected to the bases. The milling guide establishes a series of reference planes each including a slot. A powered milling device having a burr connected thereto is guided by the slots along the reference planes to accurately mill away a portion of the bone. The milling device includes a bobbin-shaped tip which positively engages the slots to ensure that the milling device is held substantially perpendicular to the reference planes of the milling guide. If necessary, other instrumentation may be connected to the femoral bases which would form a common connection point for the additional instruments thereby ensuring alignment between the various instruments. Optionally, a one piece cutting guide may be connected to the bases to allow resection of the bone by a standard oscillating saw blade. The cutting guide includes a plurality of slots such that all the cuts required for the femur can be made with one cutting guide without reorienting the guide.

Guide for femoral milling instrumention for use in total knee

Femoral milling instrumentation for use in total knee arthroplasty with

The invention is directed to milling instrumentation used for preparing a bone for receiving a prosthetic implant. The milling instrumentation includes a milling template for connection to an exposed end of a bone for guiding a milling device along the bone. A detachable cutting guide is removably connected to the milling template to permit a surgeon to either utilize either milling or cutting techniques in resecting the bone.

Orthopaedic milling template with attachable cutting guide

Orthopaedic bone cutting guide

Growing community of inventors

Poughkeepsie, NY, United States of America

Daniel P O'Connor