Freescale Semiconductor,inc.

Future Wei Technologies, Inc.

Other

Daniel P McCarthy

Lawrence Edwin Connell

Neal W Hollenbeck

Brian Creed

Kent Jaeger

Michael Lee Bushman

Buoyancy aid

An apparatus comprising a latch comprising a differential inverter configured to receive a differential input signal and generate a differential output signal, a pair of cross-coupled inverters coupled to the differential inverter, and a first clock switch configured to couple the differential inverter to a voltage source, a second clock switch configured to couple the differential inverter to a ground, wherein the first clock switch and the second clock switch are configured to receive a differential clock signal, and wherein the first clock switch and the second clock switch are both open or both closed depending on the differential clock signal, a second latch, wherein the first latch and the second latch are configured as a frequency divider, and a logic circuit coupled to each latch, wherein the logic circuits are configured to generate both an in-phase reference output signal and a quadrature output signal.

Low power high speed quadrature generator

An apparatus comprising a frequency divider comprising a first latch and a second latch coupled to the first latch in a toggle-flop configuration, and an output circuit comprising a first p-channel transistor, wherein the gate of the first p-channel transistor is configured to receive a clock signal, a first n-channel transistor, wherein the gate of the first n-channel transistor is coupled to the first latch, a second n-channel transistor connected in series with the first p-channel transistor and the first n-channel transistor and wherein the gate of the second n-channel transistor is configured to receive the clock signal, a second p-channel transistor, wherein the gate of the second p-channel transistor is configured to receive the clock signal, and a third n-channel transistor in series with the second p-channel transistor and the second n-channel transistor, wherein the output circuit is configured to generate a pair of in-phase reference signals.

Low power local oscillator quadrature generator

A personal floatation device includes an attachment device that selectably couples to a user's body. The personal floatation device includes a housing that couples to the attachment device. The housing includes a base and an outer wall extending outwardly from a perimeter of the base. The housing includes an inner wall enclosed by the outer wall and extending outwardly from an interior region of the base. The housing includes a compressed air container extending through the inner wall. The housing includes a compressed air activation device functionally coupled to the compressed air container such that, when triggered, releases air therefrom. The housing includes an air bladder in fluid communication with the compressed air container. The housing includes a breakaway cover coupled to the outer wall that detaches when exposed to pressure from the air bladder inflating. The housing include a trigger device functionally coupled to the compressed air activation device.

Personal floatation device

An apparatus comprising a frequency divider comprising a first latch configured to receive a first clock signal and a complement of the first clock signal and to generate a first latch first output, and a second latch coupled to the first latch in a toggle-flop configuration, a first output circuit comprising a p-channel transistor, wherein the gate of a p-channel transistor is configured to receive the first clock signal, and a n-channel transistor, wherein the drain of the p-channel transistor is directly connected to the drain of a n-channel transistor, wherein the gate of the n-channel transistor is configured to receive the first latch first output, wherein the source of the n-channel transistor is configured to receive the complement of the first clock signal, and wherein the first output circuit is configured to generate an in-phase reference signal, and a second output circuit configured to generate a quadrature signal.

Low power quadrature waveform generator

An apparatus comprising a low noise mixer comprising a transconductance amplifier configured to receive a differential voltage and to generate a differential current signal, a passive mixer directly connected to an output of the transconductance amplifier, and a transimpedance amplifier coupled to the passive mixer, wherein the transimpedance amplifier is configured to receive a current signal and convert the current signal to a voltage signal.

Low noise mixer

A variable attenuator and method of attenuating a signal is presented. The variable attenuator contains an input that receives an input signal to be attenuated. A voltage divider between a resistor and parallel MOSFETs provides the attenuated input signal. The MOSFETs have different sizes and have gates that are connected to a control signal through different resistances such that the larger the MOSFET, the larger the resistance. The control signal is dependent on the output of the attenuator. The arrangement extends the linearity of the attenuation over a wide voltage range of the control signal and decreases the intermodulation distortion of the attenuator.

Linear voltage controlled variable attenuator with linear DB/V gain slope

An amplifier and method of amplifying a signal is presented. The amplifier contains a fixed gain stage, a digitally controllable gain stage, and a continuously variable attenuator connected between the fixed and controllable gain stages. The attenuator and controllable gain stage are controllable such that the gain of the controllable gain stage is decreased when the attenuation of the attenuator reaches a predetermined maximum value and the attenuation of the attenuator is reduced thereafter. The output power level of the amplifier remains constant.

Amplifier with improved noise performance and extended gain control range

An amplifier, tuner, and method of amplification are provided. The amplifier has a pair of transistors. Each transistor has a control terminal and an output terminal disposed between the transistor and a power supply input. A first network is connected between each power supply input and output terminal. The first network contains a first resistor and a first switch connected in parallel with the first resistor. A second network is connected between the transistors. The second network contains a first and second combination. Each of the first and second combinations contains a second resistor and a second switch connected in parallel with the second resistor. The first and second combinations are connected by a third switch.

High linearity and low noise amplifier with continuously variable gain control

A frequency source having a fast start-up time and low noise in steady state is presented. The frequency source includes an oscillator and a hybrid automatic gain control (AGC) loop that switches between an analog AGC loop at oscillator start up and a digital AGC loop at steady state operation. The analog AGC loop includes a peak detector connected to the oscillator and an error integrator integrating the difference between the peak detector output and a reference voltage. The digital AGC loop includes a comparator comparing the peak detector output and high/low reference voltages, an oscillator counter providing a timer signal, a digital-to-analog converter (DAC) supplied with a digital word, and a low pass filter between the DAC and the oscillator. The timer signal causes a multiplexer to select either the analog AGC loop or the digital AGC loop.

Growing community of inventors

Elk Grove Village, IL, United States of America

Daniel P McCarthy