Skyworks Solutions, Inc.

Freescale Semiconductor,inc.

Daniel Lee Kaczman

Manish N Shah

James Phillip Young

Russ Alan Reisner

Lawrence Edwin Connell

Joseph P Golat

Yu-Jui Lin

Andy Cheng Pang Wu

Mohammed S Alam

Mohammed Rachedine

Haibo Cao

Nai-Shuo Cheng

David L Cashen

Lu M Han

Apparatus and methods for output matching of power amplifiers are provided. In certain configurations, a mobile device includes a power amplifier that amplifies an RF signal to generate an amplified RF signal at an output, an envelope tracker that generates a power amplifier supply voltage based on an envelope of the RF signal, a supply voltage biasing circuit that provides the power amplifier supply voltage from the envelope tracker to the output of the power amplifier, and an output matching circuit connected to the output of the power amplifier via an input node. The output matching circuit includes a first capacitor and a first inductor connected in series between the input node and ground, a second capacitor connected between the input node and ground, a second inductor connected between the input node and an intermediate node, and a DC blocking capacitor connected between the intermediate node and an output node.

Output matching of power amplifiers

Apparatus and methods for power amplifier output matching is provided. In certain configurations, an output matching circuit includes a supply voltage biasing circuit electrically connected between an input node and a power high supply voltage, a second-order harmonic series resonant circuit electrically connected between the input node and a power low supply voltage, a third-order harmonic parallel resonant circuit electrically connected between the input node and a harmonic frequency grounding node, a third-order harmonic series resonant circuit electrically connected between the harmonic frequency grounding node and the power low supply voltage, and a DC blocking capacitor electrically connected between the harmonic frequency grounding node and an output node.

Apparatus and methods for power amplifier output matching

Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.

Apparatus and methods for reducing capacitive loading of an envelope tracker

Apparatus and methods for reducing capacitive loading of a power amplifier supply control module are disclosed. In one embodiment, a method of power supply control in a power amplifier system includes controlling a voltage level of a supply voltage using a supply control module, amplifying a first radio frequency (RF) signal using a first power amplifier module, amplifying a second RF signal using a second power amplifier module, delivering the supply voltage to a first supply input of the first power amplifier module through a first resonant circuit, and delivering the supply voltage to a second supply input of the second power amplifier module through a second resonant circuit. The first resonant circuit includes a first inductor and a first capacitor electrically connected in parallel, and the second resonant circuit includes a second inductor and a second capacitor electrically connected in parallel.

Apparatus and methods for reducing capacitive loading of a power amplifier supply control module

Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes an envelope tracker configured to provide a supply voltage to a plurality of power amplifiers. The power amplifiers include power supply inputs electrically connected in a star configuration so as to reduce a capacitive load of the envelope tracker. The distributed capacitance of the power amplifiers is used to provide RF grounding so as to reduce the size of or eliminated the use of bypass capacitors.

Apparatus and methods for capacitive load reduction

Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes a power amplifier configured to amplify a radio frequency (RF) signal of a first frequency and an envelope tracker configured to control a supply voltage of the power amplifier using an envelope of the RF signal. The power amplifier system further includes an inductor electrically connected between the power amplifier and the envelope tracker and a capacitor electrically connected between the power amplifier and the envelope tracker. The capacitor and the inductor are configured to have a resonance near the first frequency.

A balanced mixer circuit (and) in a baseband receiver () includes an oscillator circuit (), a mixer (and), a digital-to-analog converter (and) and a digital signal processor (). The mixer includes CMOS devices (and). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

Mixer circuits for second order intercept point calibration

Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.

Apparatus and methods for oscillation suppression

Methods and corresponding systems for receiving a radio frequency signal include a receiver capable of switching operating modes and operable to receive the radio frequency signal in any of the operating modes. A metric monitor is coupled to the receiver and operable to provide a metric. A controller is responsive to the metric and operable to switch the receiver between the operating modes. The operating modes can include a zero intermediate frequency (ZIF) mode and a very low intermediate frequency (VLIF) mode. The metric can include a received signal strength indicator (RSSI) and an adjacent channel indicator. The receiver can be configured to operate in the ZIF mode in response to the RSSI value satisfying a threshold and configured to operate in the VLIF mode in response to the RSSI value failing to satisfy the threshold.

Receiver configurable in a plurality of modes

A high performance radio frequency receiver includes an isolated transconductance amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to multiple electrically isolated currents; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter. IIP2 calibration of the in-phase and quadrature channels may be optimized using the isolated transconductance amplifier.

Split channel receiver with very low second order intermodulation

A high performance radio frequency receiver includes a low noise amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to a current; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The in-phase and quadrature pulses have a duty cycle of 20-35%. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter. Decreased die size, current drain, cost, and complexity, as well as improvements in gain, 1/f noise, noise figure, sensitivity, and linearity may result.

High performance CMOS radio frequency receiver

A multi-band high gain mixer and quadrature signal generator allows a receiver system to receive signals at multiple frequency bands without requiring significant hardware duplication. A single mixer directly receives any of three communication frequency bands such as Universal Mobile Telecommunication System (UMTS), Personal Communication Services (PCS), Digital Communication System (DCS), and Japan and US W-CDMA 800 bands without amplification. A Serial-Parallel Interface selectably forwards RF signals within the receiver's frequency channels to the mixer for demodulation into in-phase (I) and quadrature (Q) signals at a common IF output from the multi-mode receiver. Significant power and cost advantages are attained by elimination of duplicate mixers and amplifier stages.

Multi-band mixer and quadrature signal generator for a multi-mode radio receiver

A VCO circuit including a VCO, a voltage supply and a control circuit. The VCO has a supply voltage input and a gain that changes with its supply voltage. The voltage supply has an adjust input and an output coupled to the supply voltage input of the VCO. The voltage supply adjusts the voltage level of its output in response to changes of the adjust input. The control circuit has a first adjust output coupled to the adjust input of the voltage supply to adjust the gain of the VCO. The VCO may include a frequency range adjust input controlled by the control circuit so that the gain of the VCO is adjusted when the frequency range is changed. For a multi-band VCO, the gain is adjusted for different frequency bands to maintain a relatively constant gain for each frequency band.

Growing community of inventors

Newbury Park, CA, United States of America

Daniel Lee Kaczman