Infineon Technologies Ag

Infineon Technologies Austria Ag

Daniel Kueck

Romain Esteve

Thomas Aichinger

Ralf Siemieniec

Dethard Peters

Wolfgang Bergner

Roland Rupp

Rudolf Elpelt

Hans-Joachim Schulze

Thomas Basler

Caspar Leendertz

Bernd Zippelius

Michael Hell

Gerald Unegg

Victorina Poenariu

Gerald Reinwald

Franz Hirler

Anton Mauder

Wolfgang Werner

Jens Peter Konrath

Gilberto Curatola

David Laforet

Cedric Ouvrard

Andreas Voerckel

Christian Strenger

Karlheinz Feldrapp

A semiconductor component includes: gate structures extending from a first surface into an SiC semiconductor body; a drift zone of a first conductivity type formed in the SiC semiconductor body; first mesas and second mesas arranged between the gate structures in the SiC semiconductor body; body areas of a second conductivity type arranged in the first mesas and the second mesas, the body areas each adjoining a first side wall of one of the gate structures; first shielding areas of the second conductivity type adjoining a second side wall of one of the gate structures; second shielding areas of the second conductivity type adjoining the body areas in the second mesas; and diode areas of the conductivity type of the drift zone, the diode areas forming Schottky contacts with a load electrode between the first shielding areas and the second shielding areas.

Silicon carbide field-effect transistor including shielding areas

A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.

By using at least one of a processor device and model transistor cells, a set of design parameters for at least one of a transistor cell and a drift structure of a wide band-gap semiconductor device is determined, wherein an on state failure-in-time rate and an off state failure-in-time rate of a gate dielectric of the transistor cell are within a same order of magnitude for a predefined on-state gate-to-source voltage, a predefined off-state gate-to-source voltage, and a predefined off-state drain-to-source voltage.

Semiconductor device with transistor cells and a drift structure and method of manufacturing

A semiconductor device includes a trench extending from a first surface into a SiC semiconductor body. The trench has a first sidewall, a second sidewall opposite to the first sidewall, and a trench bottom. A gate electrode is arranged in the trench and is electrically insulated from the SiC semiconductor body by a trench dielectric. A body region of a first conductivity type adjoins the first sidewall. A shielding structure of the first conductivity type adjoins at least a portion of the second sidewall and the trench bottom. A first section of the trench bottom and a second section of the trench bottom are offset to one another by a vertical offset along a vertical direction extending from the first surface to a second surface of the SiC semiconductor body opposite to the first surface.

SiC semiconductor device with offset in trench bottom

A first semiconductor body including type IV semiconductor material is provided. A second semiconductor body including type III-V semiconductor material is provided. A first adhesion layer is formed on the first semiconductor body. A second adhesion layer is formed on the second semiconductor body. The first and the second semiconductor bodies are bonded together by adhering the first and the second adhesion layers to one another.

Method of forming compound semiconductor body

A trench is formed that extends from a main surface into a crystalline silicon carbide semiconductor layer. A mask is formed that includes a mask opening exposing the trench and a rim section of the main surface around the trench. By irradiation with a particle beam a first portion of the semiconductor layer exposed by the mask opening and a second portion outside of the vertical projection of the mask opening and directly adjoining to the first portion are amorphized. A vertical extension of the amorphized second portion gradually decreases with increasing distance to the first portion. The amorphized first and second portions are removed.

Method of manufacturing a silicon carbide semiconductor device by removing amorphized portions

A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.

Semiconductor device with diode region and trench gate structure

A semiconductor device incudes a cell region and a contact region, the cell region including a functional unit including a gate electrode, a source and a drain electrode, and the contact region including a gate pad. The gate electrode, the gate pad and the source electrode are disposed on a first main surface of a semiconductor substrate, and the drain electrode is disposed on a second main surface of the semiconductor substrate, the second main surface being opposite to the first main surface. A shielding member is disposed between the gate pad and the drain electrode, the shielding member being electrically connected to the source electrode.

Semiconductor device

A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.

Silicon-carbide transistor device with a shielded gate

A semiconductor device includes a source zone electrically connected to a first load terminal, a contiguous zone isolating the source zone from a drift zone, and a trench extending into a semiconductor body along a vertical direction and including a first electrode electrically connected to a control terminal and an insulator in contact with the contiguous zone and which isolates the first electrode from the semiconductor body. The insulator has, at a trench bottom region, a first thickness along the vertical direction, and, at a trench top region, a second thickness along a lateral direction, the first thickness being greater than the second thickness by a factor of at least 1.5. The contiguous zone is arranged in contact with the insulator and extends further along the vertical direction than the trench, and the trench bottom region and the contiguous zone overlap along the lateral direction.

Wide bandgap semiconductor device

A silicon-carbide semiconductor substrate having a plurality of first doped regions being laterally spaced apart from one another and beneath a main surface, and a second doped region extending from the main surface to a third doped region that is above the first doped regions is formed. Fourth doped regions extending from the main surface to the first doped regions are formed. A gate trench having a bottom that is arranged over a portion of one of the first doped regions is formed. A high-temperature step is applied to the substrate so as to realign silicon-carbide atoms along sidewalls of the trench and form rounded corners in the gate trench. A surface layer that forms along the sidewalls of the gate trench during the high-temperature step from the substrate is removed.

Method of forming a silicon-carbide device with a shielded gate

A semiconductor device according to an embodiment is at least partially arranged in or on a substrate and includes a recess forming a mesa, wherein the mesa extends along a direction into the substrate to a bottom plane of the recess and includes a semiconducting material of a first conductivity type, the semiconducting material of the mesa including at least locally a first doping concentration not extending further into the substrate than the bottom plane. The semiconductor device further includes an electrically conductive structure arranged at least partially along a sidewall of the mesa, the electrically conductive structure forming a Schottky or Schottky-like electrical contact with the semiconducting material of the mesa, wherein the substrate comprises the semiconducting material of the first conductivity type comprising at least locally a second doping concentration different from the first doping concentration along a projection of the mesa into the substrate.

Semiconductor device, junction field effect transistor and vertical field effect transistor

A semiconductor device includes a cell region and a contact region, the cell region including a functional unit including a gate electrode, a source and a drain electrode, and the contact region including a gate pad. The gate electrode, the gate pad and the source electrode are disposed on a first main surface of a semiconductor substrate, and the drain electrode is disposed on a second main surface of the semiconductor substrate, the second main surface being opposite to the first main surface. A shielding member is disposed between the gate pad and the drain electrode, the shielding member being electrically connected to the source electrode.

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Villach, Austria

Daniel Kueck