International Business Machines Corporation

Globalfoundries Inc.

Freescale Semiconductor,inc.

Daniel K Tekleab

Jeffrey W Sleight

Dureseti Chidambarrao

Xiangdong Chen

Gauri V Karve

Xiaobin Yuan

Jae-Eun Park

Hung H Tran

Deleep R Nair

Jie Deng

Weipeng Li

Nam Sung Kim

Tien Ying Luo

Tien-Ying Luo

A method and apparatus are described for integrating dual gate oxide (DGO) transistor devices () and core transistor devices () on a single substrate () having a silicon germanium channel layer () in the PMOS device areas (), where each DGO transistor device () includes a metal gate (), an upper gate oxide region () formed from a second, relatively higher high-k metal oxide layer (), and a lower gate oxide region () formed from a first relatively lower high-k layer (), and where each core transistor device () includes a metal gate () and a core gate dielectric layer () formed from only the second, relatively higher high-k metal oxide layer ().

Dual high-K oxides with SiGe channel

A nanotubular MOSFET device and a method of fabricating the same are used to extend device scaling roadmap while maintaining good short channel effects and providing competitive drive current. The nanotubular MOSFET device includes a concentric tubular inner and outer gate separated from each other by a tubular shaped epitaxially grown silicon layer, and a source and drain respectively separated by spacers surrounding the tubular inner and outer gates. The method of forming the nanotubular MOSFET device includes: forming on a substrate a cylindrical shaped Si layer; forming an outer gate surrounding the cylindrical Si layer and positioned between a bottom spacer and a top spacer; growing a silicon epitaxial layer on the top spacer adjacent to a portion of the cylindrical shaped Si layer; etching an inner portion of the cylindrical shaped Si forming a hollow cylinder; forming an inner spacer at the bottom of the inner cylinder; forming an inner gate by filling a portion of the hollow cylinder; forming a sidewall spacer adjacent to the inner gate; and etching a deep trench for accessing and contacting the outer gate and drain.

Silicon nanotube MOSFET

A nanotubular MOSFET device extends a scaling roadmap while maintaining good short channel effects and providing competitive drive current. The nanotubular MOSFET device includes a concentric tubular inner and outer gate separated from each other by a tubular shaped epitaxially grown silicon layer, and a source and drain respectively separated by spacers surrounding the tubular inner and outer gates.

A field effect transistor includes a partial SiGe channel, i.e., a channel including a SiGe channel portion, located underneath a gate electrode and a Si channel portion located underneath an edge of the gate electrode near the drain region. The SiGe channel portion can be located directly underneath a gate dielectric, or can be located underneath a Si channel layer located directly underneath a gate dielectric. The Si channel portion is located at the same depth as the SiGe channel portion, and contacts the drain region of the transistor. By providing a Si channel portion near the drain region, the GIDL current of the transistor is maintained at a level on par with the GIDL current of a transistor having a silicon channel only during an off state.

Asymmetric channel MOSFET

Dual high-k oxides with sige channel

Growing community of inventors

Wappingers Falls, NY, United States of America

Daniel K Tekleab