International Business Machines Corporation

Daniel Joseph Liguori

Roderick Michael West

Edward Kelley Evans

Stephen B Barrett

David D Litten

Peter Casavant

Hiroyuki Ando

The graphics display system comprises a data bus for transferring a set of application pixels, wherein a set consists of W number of blocks of data, and wherein each application pixel is M number of blocks. The graphics display system further comprises an address bus for transferring memory addresses, a graphics controller for outputting pixel data on the data bus at a rate of one set per memory clock cycle and for outputting one or more column addresses on the address bus for each set, and a graphics memory configured for a memory field size of N number of blocks such that an application pixel being stored is allocated N blocks. A set of application pixels is transferred over the data bus to the graphics memory, and, one or more column addresses are transferred over the address bus during the a memory clock cycle over the address bus. In addition, a row address is transferred to the graphics memory. Each block of the transferred set belongs to one of N/M groups of blocks, and each of these blocks are stored in the graphics memory in a memory field indicated by a transferred row and column address pair, wherein each group of blocks is stored at a different one of N/M number of column addresses for any given transferred set.

Method and system of updating graphics memory in a graphics display

A programmable serializer comprising a multi-bit input port, a multi-bit output port, at least one multiplexer and at least one programmable address counter corresponding to the multiplexer for generating a sequence of multiplexer data input addresses that are inputted into the multiplexer address input. The multiplexer has an output connected to the multi-bit output port, an address input and a plurality of data input channels having addresses. Each data input channel is connected to a corresponding bit of the multi-bit input port. At least one data input channel is coupled to the multiplexer output when the corresponding address of the data input channel is applied to the address input. The programmable address counter receives and stores an initial address value, an address increment value and a count value and generates a sequence of addresses based on these values. The initial address value represents the multiplexer data channel that is to be initially coupled to the multiplexer output. The address increment value represents the increment that must be added to a current address in order to reach a next address. The count value represents the number of address that must be generated by the counter prior to restarting the sequence at the initial address value.

Programmable serializer using multiplexer and programmable address

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Essex Junction, VT, United States of America

Daniel Joseph Liguori