Nxp Usa, Inc.

Daniel Joseph Lamey

Kevin Kim

Ibrahim Khalil

Vikas Shilimkar

Humayun Kabir

Bruce McRae Green

Yu-Ting David Wu

A device having a reference transistor fabricated within the same semiconductor substrate as a primary transistor (e.g., configured for use in a radiofrequency amplifier or other active circuit) has a shared metallization area coupled to a current terminal of both transistors configured to shield a control terminal of the reference transistor from coupling of alternating current interference from alternating currents within the primary transistor.

Transistor circuits with shielded reference transistors

A transistor includes a source contact connected to a Through-Silicon Via (TSV). A drain contact is connected to a first pad. A gate structure is interposed between the source contact and the drain contact. A second pad is connected to the gate structure, the second pad comprising a first side diametrically opposed to a second side, and a third side interposed therebetween, the source contact proximal to the third side, a first portion of the first side and a second portion of the second side.

Transistor with center fed gate

An integrated circuit device includes a device substrate having first and second opposing surfaces, a first component electrode coupled to the first surface, and a conductive plane coupled to the second surface. The integrated circuit device also includes a plurality of through substrate vias electrically coupling a first region of the first component electrode to the conductive plane through the device substrate, wherein a second adjacent region of the first component electrode is substantially devoid of through substrate vias. Arrangement of the plurality of through substrate vias in the first region is based on a projected current distribution through the first component electrode when the integrated circuit device is operational.

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Chandler, AZ, United States of America

Daniel Joseph Lamey