International Business Machines Corporation

Abb Technology Ag

Daniel Josef Egger

Nikolaj Moll

Stefan Woerner

Stefan Filipp

Gian R Von Salis

Marc Ganzhorn

Youngseok Kim

Don Greenberg

Douglas T McClure, Iii

Sarah Elizabeth Sheldon

Andreas Fuhrer

Takashi Imamichi

Ivano Tavernelli

Naoki Kanazawa

Panagiotis Barkoutsos

Daniel Neeser

Jennifer Ranae Glick

Atsushi Matsuo

Lutz Gebhardt

Christa Zoufal

Dieter Schön

Nathan Don Earnest-Noble

Lauren Capelluto

Manning Chuor

Caroline Tornow

Dieter SCHÖN

Embodiments are provided for error mitigation in quantum programs. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include a noise assessment component that identifies a noise condition of a qubit device based on a noise property of quantum hardware configured to operate on the qubit device. The qubit device is represented in a quantum program executable on the noisy quantum hardware. The computer-executable components also can include a compilation component that modifies the quantum program by inserting a defined sequence of error-mitigating operations into the quantum program based on the noise condition.

Error mitigation in a quantum program

Techniques regarding quantum computer error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that interpolates a gate parameter associated with a target stretch factor from a reference model that includes reference gate parameters for a quantum gate calibrated at a plurality of reference stretch factors.

Stretch factor error mitigation enabled quantum computers

Techniques regarding quantum error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that can add a set of scaled quantum gates to a quantum circuit for error mitigation. The set of scaled quantum gates can comprise a quantum gate and an inverse of the quantum gate. Also, the set of scaled quantum gates can have a rotation angle based on a pulse schedule to achieve a target stretch factor.

Quantum error mitigation based on scaled gates

Systems and methods that address an optimized method to handle portfolio constraints such as integer budget constraints and solve portfolio optimization problems that map both to mixed binary and quadratic binary optimization problems. A digital processor is used to create a hierarchical clustering; this clustering is leveraged to allocate capital to sub-clusters of the hierarchy. Once the sub-clusters are sufficiently small, a quantum processor is used to solve the portfolio optimization problem. Thus, the innovation employs clustering to reduce an optimization problem to sub-problems that are sufficiently small enough to be solved using a quantum computer given available qubits.

Hierarchical portfolio optimization using clustering and near-term quantum computers

Systems and methods that address an optimized method to improve systems and methods for handling inequality constraints in mixed binary optimization problems on quantum computers and to solve local optima which significantly improves system performance. Embodiments employ an improved methodology that can optimize parameters, determine an optimal slack variable and optimize variational parameters for fixed slack variables. This procedure allows to move out of local minima, solve an optimization and improve the system performance by providing optimal results. These embodiments also extend to variational hybrid quantum/classical algorithms for gate-based quantum computers.

System and method for handling inequality constraints in mixed binary optimization on quantum computers

Techniques and a system to facilitate simulation-based optimization on a quantum computer are provided. In one example, a system includes a quantum processor. The quantum processor performs a quantum amplitude estimation process based on a probabilistic distribution associated with a decision-making problem. Furthermore, the quantum processor includes a simulator that simulates the decision-making problem based on the quantum amplitude estimation process.

Simulation-based optimization on a quantum computer

A quantum processing comprises n fixed-frequency quantum circuits of distinct frequencies, where n&#x2265;3. The device further comprises a frequency-tunable coupler, designed in such a manner that its frequency can be concomitantly modulated at m frequencies, where m&#x2265;2, and wherein said m frequencies correspond, each, to a difference of energy between a respective pair of quantum states spanned by the quantum circuits. The quantum circuits are, each, coupled to the tunable coupler. The method may rely on modulating the frequency of the tunable coupler concomitantly at said m frequencies. This, for example, is done so as to drive m energy transitions between connected pairs of states spanned by the quantum circuits and achieve an entangled state of the quantum circuits as a superposition of l states spanned by the quantum circuits, l&#x2265;m.

Multi-qubit entangling gate using a frequency-modulated tunable coupler

A method of operating a quantum information processing apparatus is provided. This apparatus includes a structure of coupled qubits, where N&#x2265;3, wherein the structure further includes coupling elements. The coupling elements couple pairs of N qubits, wherein, at least, a portion of the qubits are connected by a respective one of the coupling elements, whereby the two qubits of each said pair are connected by a respective coupling element. A method comprises identifying a path of M qubits in the structure of coupled qubits, wherein the path extends from a first qubit to a last qubit of the N qubits. The identified path consists of M qubits and M&#x2212;1 coupling elements alternating along said path, where 2&#x3c;M&#x2264;N. A single-cycle operation is performed, wherein all pairs of two successive qubits in the identified path are concomitantly subjected to exchange-type interactions of distinct strengths.

Single-cycle operations using controllably mediated exchange-type interactions between qubits

The technology described herein is directed towards quantum circuits used to analyze risk, including expected value, variance, value at risk and conditional value at risk metrics. Aspects can comprise modeling uncertainty of one or more random variables to provide a first quantum sub-circuit by mapping the one or more variables to quantum states represented by a selected number of qubits using quantum gates, and encoding a risk metric into a second quantum sub-circuit, the second quantum sub-circuit comprising a first ancilla qubit and Y-rotations controlled by one or more other qubits. Further aspects can comprise performing amplitude estimation based on the first sub-circuit and the second sub-circuit to extract a probability value corresponding to the risk metric, wherein the probability value represents a probability of measuring a one state in the ancilla qubit.

Quantum circuit risk analysis

Techniques relate to operating a quantum processing device is provided. The device includes at least two fixed-frequency quantum circuits coupled to a frequency-tunable coupler. The frequency of the coupler can be modulated so as to drive at least two selectively addressable energy transitions in the quantum processing device. The method includes modulating the frequency of the coupler so as to drive two first-order energy transitions. This is done so as to transfer (at least partly) an excitation of one of the quantum circuits to at least another one of the quantum circuits, via the tunable coupler. Related quantum processing devices are also provided.

Fast quantum gates with first-order transitions via frequency-modulated tunable coupling element

A method for operating a quantum processing device is provided including at least two quantum circuits coupled to a tunable coupler, wherein the quantum circuits are subject to cross-talk, the method including: applying a primary signal to the quantum circuits so as to drive one or more energy transitions between states spanned by the quantum circuits; and applying a compensation signal to the tunable coupler, the compensation signal designed so as to shift at least one state spanned by the quantum circuits, in energy, to compensate for cross-talk between the quantum circuits. Related quantum processing devices and chips are also provided.

Cross-talk compensation in quantum processing devices

A surge arrester includes an active part, two electrodes resting against the active part and a connecting element. The active part and the electrodes are arranged in the connecting element. The connecting element is produced in an injection molding method or die-casting method, in which the connecting element shrinks during its production. As a result, the electrodes are firmly pressed against the active part.

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Thalwil, Switzerland

Daniel Josef Egger