Honeywell Federal Manufacturing & Technologies, LLC

Northrop Grumman Systems Corporation

US Government As Represented by the Secretary of the Army

Daniel Jonathan Ewing

Patrick Bruckner Shea

Erica C Folk

John J Talvacchio

Kyle W Maples

Pankaj B Shah

Michael Andrew Derenge

Tsvetanka Zheleva

A method and apparatus for reading unique identifiers of an integrated circuit. The unique identifiers may be physically unclonable functions (PUFs), formed by high energy ions implanted into semiconductor material of the integrated circuit. The method may include electrically or optically stimulating each of the PUFs and sensing with an optical sensor optical characteristics of resulting light emitted from the PUFs. Then the method may include comparing values associated with the optical characteristics of the PUFs with groups of stored values in a circuit database. Each of the groups of stored values may be associated with optical characteristics of PUFs of a known authentic circuit. The method may then include the controller providing verification of authenticity of the integrated circuit when each of the values associated with the optical characteristics of the PUFs match the stored values of at least one of the groups in the circuit database.

Method of authenticating integrated circuits using optical characteristics of physically unclonable functions

An integrated circuit and method of forming the integrated circuit, including the steps of forming channels partially into a thickness of a semiconductor layer or through the thickness of the semiconductor layer and partially through a thickness of a substrate layer on which the semiconductor layer was formed. The method may then include underfilling or overfilling the channels with diamond. If underfilled, a remainder of the channels may be filled in with nucleation buffer layers or additional semiconductor material. If overfilled, the diamond may be selectively polished down to form a planar surface with the semiconductor layer. Next, the method may include forming an active device layer over the semiconductor material and diamond. The method may also include thinning the substrate layer down to the diamond and then placing a heat sink in physical contact with the diamond in the channel.

Method of forming an integrated circuit with heat-mitigating diamond-filled channels

A Josephson junction (JJ) quantum bit (qubits) arranged on a substrate is provided. In one embodiment, each qubit comprises a dielectric layer, a superconductor base layer portion underlying the dielectric layer and a first dielectric diffused region adjacent a dielectric layer/superconductor base layer portion junction. The qubit further comprise a superconductor mesa layer portion overlying the dielectric layer and having a second dielectric diffused region adjacent a dielectric layer/superconductor mesa layer portion junction, the first and second dielectric diffused regions mitigating further diffusion from other semiconductor processes on the plurality of qubits.

Quantum bits and methods of forming the same

Methods are provided of forming a Josephson junction (JJ) quantum bit (qubit). In one embodiment, the method comprises forming a JJ trilayer on a substrate. The JJ trilayer is comprised of a dielectric layer sandwiched between a bottom superconductor material layer and a top superconductor material layer. The method further comprises performing a thermal hardening process on the JJ trilayer to control diffusion of the dielectric layer into the bottom superconductor material layer and the top superconductor material layer, and etching openings in the JJ trilayer to form one or more JJ qubits.

Quantum bits and method of forming the same

A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises a second dislocation density, wherein the second dislocation density may be lower than the first dislocation density. In addition, a method for fabricating a gallium nitride semiconductor layer that includes masking an underlying gallium nitride layer with a mask that comprises an array of columns and growing the underlying gallium nitride layer through the columns and onto said mask using metal-organic chemical vapor deposition pendeo-epitaxy to thereby form a pendeo-epitaxial gallium nitride layer coalesced on said mask to form a continuous pendeo-epitaxial monocrystalline gallium nitride semiconductor layer.

Growing community of inventors

Overland Park, KS, United States of America

Daniel Jonathan Ewing