Avigilon Corporation

Motorola Solutions, Inc.

Daniel James Booth

Shaun P Marlatt

Thanh Tam Ho

Jinsong Zhu

Methods, systems, and techniques for tracing callstacks, the results of which can be used to identify a source of a memory leak. A memory heap is sampled at different times to determine counts of respective allocations of different allocations at the different times. From the counts of the respective allocations at the different times, rates at which the respective allocations have changed over the different times, and which of the rates is equal to or greater than a leak indication rate, are determined. Callstacks for respective allocations of the different allocation sizes for each of the rates that is equal to or greater than the leak indication rate are traced. The results of the tracing may be used during debugging to identify the source of the memory leak.

Method and system for identifying a source of a memory leak

Methods, systems, infrastructures and techniques for operating a multi-process application are described. The method includes starting a master process and the master process instantiating a first child process and a first inter-process communication (IPC) channel; and instantiating a second child process and a second IPC channel. The method further includes the master process instantiating a third IPC channel used for a direct peer-to-peer (P2P) communication; and providing first and second handles of the third IPC channel to the first and second child processes, using the first and second IPC channels, respectively. The first child process and the second child process can communicate directly using the received first and second handles of the third IPC channel.

Secured multi-process architecture

An n-lane automatic license plate recognition system (where n is an integer greater than one) and a method for dropping video frames in this system is disclosed. The method includes receiving, at an input of a first stage of a two-stage restrictor, a plurality of video frames. In the first stage of the two-stage restrictor, a subset of the plurality of video frames is dropped. An output of the first stage is coupled to an input of a second stage of the two-stage restrictor such that receiving and non-receiving of individual ones the plurality of video frames by the second stage is controlled by the first stage. In the second stage after the first stage, a further subset of the plurality of video frames is dropped to effect controlled frame input into a processor that performs at least one recognition analytic on remaining video frames of the plurality of video frames. The dropping of the further subset is based on at least one drop condition including a lane-specific drop condition.

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Vancouver, Canada

Daniel James Booth