Itt Manufacturing Enterprises, Inc.

Itt Corporation

Daniel J Schwarz

Donald John Rasmussen

A buffer system includes a logic adjusting circuit for translating a first logic level of a first component to a second logic level of a second component. The first and second logic level values are substantially different, and the buffer system has no directional control signal. A method of interfacing at least two components with different logic voltage requirements on a single bus without a separate directional control signal includes initializing a buffering circuit, activating the buffering circuit, transferring data through the buffering circuit, and deactivating the buffering circuit. A method of implementing a bi-directional interface between at least two devices interfaced on a bus includes providing a plurality of logic components interconnected to transfer data through the bus, and transferring data through the bus from a first device to a second device. The direction of data transfer is determined without a separate directional control signal.

Method and apparatus for buffering bi-directional open drain signal lines

Disclosed is a digital pulse shaping circuit for reducing undesirable frequency components in subsequent data modulated transmissions, which circuit can be easily manufactured as a monolithic integrated circuit. In a preferred embodiment, the pulse shaping circuit employs an edge detector circuit to detect data transitions of an incoming serial data stream. Upon a data edge detection, the edge detector provides a control signal to a digital counter to enable the counter to begin counting applied clock pulses and generate a linear count. The linear count is provided to a decoding circuit, which generates an output word as a nonlinear function of the value of the count. The decoded output word then drives a digital modulator which modulates an RF carrier to provide wireless data transmission with improved spectral efficiency.

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Fort Wayne, IN, United States of America

Daniel J Schwarz