International Business Machines Corporation

Daniel J Phipps

Wayne Frederick Ellis

Mark William Kellogg

Paul William Coteus

Warren Edward Maule

Alphonso Philip Lanzetta

James D Wagoner

James K Tam

Ralph Herman Genz

A method for performing a common cancel (CC) function on a dynamic random access memory (DRAM) semiconductor device to improve reliability and speed of a memory system. The CC function rakes advantage of the intrinsic delays associated wit memory read operations at high clock frequencies, and the increased write latency commensurate with increased read latencies where non-zero larencies for read and write operations are the norm by permitting address and command ECC structures to operate in parallel with the address and command re-drive circuitt The CC function is extendable to future DDRand DDRoperating requirements in which latency of higher frequency modes will increase due to the shift from 2 bit pre-fetch to 4 and 8 bit pre-fetch architecture.

Method for performing a command cancel function in a DRAM

A synchronous dynamic random access memory (SDRAM) semiconductor device which uses a command cancel function to improve reliability and speed of a memory system. The CC function takes advantage of the intrinsic delays associated with memory read operations at high clock frequencies, and the increased write latency commensurate with increased read latencies where non-zero latencies for read and write operations are the norm by permitting address and command ECC structures to operate in parallel with the address and command re-drive circuits. The CC function is extendable to future DDR2 and DDR3 operating requirements in which latency of higher frequency modes will increase due to a shift from 2 bit pre-fetch to 4 and 8 bit pre-fetch architecture.

Synchronous dynamic random access memory device having memory command cancel function

A data processing system including an improved method and apparatus for the arrangement and interconnection between electronic devices to improve system cycle time. The apparatus possesses a) a plurality of: memory SIMMs, memory devices on the noted memory SIMMs and registers; b) a clock; c) means for connecting signals between the memory devices on the memory SIMMs and the registers; and d) means for connecting signals between the memory devices on the memory SIMMs and the clocks.

Clustered, buffered simms and assemblies thereof

Growing community of inventors

Poughkeepsie, NY, United States of America

Daniel J Phipps