National Instruments Corporation

Koninklijke Philips Corporation N.v.

Cirrus Logic Inc.

Phillips International, B.v.

Daniel J Baker

Stephen L Dark

Christopher Frederick Graf

Johnathan R W Ammerman

Ryan Hamilton Brown

Matthew J DeVoe

John L Melanson

Eric Jerome King

Ciro T Nishiguchi

Charles G Schroeder

Nigel G D'Souza

Sarvesh V Nagarajan

Thomas D Magruder

Rahul Singh

Craig M Conway

Mohit Sood

Jeff A Bergeron

J Christopher White

Johnathan Rw Ammerman

Johnathan RW Ammerman

Embodiments are described of devices and methods for processing a signal using a plurality of vector signal generators (VSGs). A digital signal may be provided to a plurality of signal paths, each of which may process a respective frequency band of the signal, the respective frequency bands having regions of overlap. The gain and phase of each signal path may be adjusted such that continuity of phase and magnitude are preserved through the regions of overlap. The adjustment of gain and phase may be accomplished by a complex multiply with a complex calibration constant. The calibration constant may be determined for each signal path by comparing the gain and phase of one or more calibration tones generated within each region of overlap. Each signal path may comprise a VSG to convert the respective signal to an analog signal, which may be combined to obtain a composite signal.

Spectral stitching method to increase instantaneous bandwidth in vector signal generators

Various embodiments are described of devices and associated methods for processing a signal using a plurality of vector signal analyzers (VSAs). An input signal may be split and provided to a plurality of VSAs, each of which may process a respective frequency band of the signal, where the respective frequency bands have regions of overlap. Each VSA may adjust the gain and phase of its respective signal such that continuity of phase and magnitude is preserved through the regions of overlap. The correction of gain and phase may be accomplished by a complex multiply with a complex calibration constant. A complex calibration constant may be determined for each VSA by comparing the gain and phase of one or more calibration tones generated with each region of overlap, as measured by each of the VSAs.

Spectral stitching method to increase instantaneous bandwidth in vector signal analyzers

Power leveling a system under test (SUT). An input signal is provided at an initial power level to the SUT. Multiple iterations are performed, each including measuring, over a specified measuring interval, power of a signal produced by the SUT in response to the input signal, and dynamically adjusting the power of the input signal in response. The measuring interval is increased over the iterations, thereby increasing accuracy of the measuring over the iterations while converging the signal to a specified power level. An initial power leveling operation may be performed for the SUT to establish a specified power level, after which the SUT is tested, during which multiple power leveling operations are performed, each including measuring power of a signal from the SUT over a specified measuring interval, and adjusting the input signal in response, thereby maintaining the specified power level during the testing while correcting for thermal droop.

Continuous power leveling of a system under test

Power leveling of a system under test

In accordance with systems and methods of the present disclosure, an apparatus may include a power converter and a controller. The controller may be configured to monitor a voltage at an input of the power converter, cause the power controller to transfer energy from the input to a load at a target current, decrease the target current responsive to determining that the voltage is less than or equal to an undervoltage threshold, and increase the target current responsive to determining that the voltage is greater than or equal to a maximum threshold voltage.

Systems and methods for controlling a power controller

Methods and systems to provide compatibility between a load and a secondary winding of an electronic transformer driven by a leading-edge dimmer may include: (a) responsive to determining that energy is available from the electronic transformer, drawing a requested amount of power from the electronic transformer thus transferring energy from the electronic transformer to an energy storage device in accordance with the requested amount of power; and (b) transferring energy from the energy storage device to the load at a rate such that a voltage of the energy storage device is regulated within a predetermined voltage range.

Systems and methods for low-power lamp compatibility with a leading-edge dimmer and an electronic transformer

In at least one embodiment, a system and method provide current compensation in a lighting system by controlling a lamp current to prevent a current through a triac-based dimmer from undershooting a holding current value. In at least one embodiment, at least one of the lamps includes a controller that controls circuitry in the lamp to draw more lamp current for a period of time than needed to illuminate a brightness of the lamp at a level corresponding to particular phase-cut angle of the supply voltage. By drawing more current than needed, the controller increases the dimmer current during the period of time to prevent the dimmer current from falling below the holding current value. In at least one embodiment, the period of time corresponds to a compensating pulse of the lamp current at a time when the dimmer current would otherwise fall below the holding current value.

Mixed load current compensation for LED lighting

Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.

Customizing operation of a test instrument based on information from a system under test

Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.

Synchronization modules for programmable hardware and use

Synchronization modules for performing synchronization of programmable hardware elements

Growing community of inventors

Austin, TX, United States of America

Daniel J Baker