International Business Machines Corporation

Daniel Isaac Rodriguez

Sungjun Chun

Mahesh Bohra

Jesus Montanez

Shakti Kapoor

Miguel Gomez Gonzalez

Nelson Wu

Anatoli Andreev

Jose M Mena

A system is provided to validate a computer processor. The system includes a computing system configured to obtain core dump data including executable instructions corresponding to a code stored in a legacy processor. An instruction-level simulator is installed in the computing system and is configured to simulate the executable instructions to generate a plurality of instruction traces. The system further includes a pre-silicon chip model simulator configured to execute the instruction traces to generate performance data. The computer processor is verified based at least in part on the performance data.

Pre-silicon chip model of extracted workload inner loop instruction traces

A computing system includes a core system and an uncore system. The core system includes a packet generator unit configured to generate a data packet having a plurality of bytes defining a target packet size, and to output a first byte among the plurality of bytes at a packet delivery start time. The uncore system includes an input/output (I/O) bridge configured to connect an I/O component to the core system, and a packet monitor unit configured to monitor the bytes delivered from the packet generator unit to the I/O component. The packet monitor unit further determines a packet delivery end time after detecting a last byte of the data packet. The computing system determines a latency attributed to the uncore system and the I/O bridge based on the packet delivery start time and the packet delivery end time.

Uncore input/output latency analysis

A device has a base with a mounting surface with a length and a stack, the stack having a diameter smaller than the length and fastened to the mounting surface. The stack may have a plurality of stack conductive layers in addition to a plurality of insulating layers that separate each of the plurality of stack conductive layers. The stack conductive layers may be separated in a manner that aligns them with corresponding printed circuit board conductive layers when the stack portion of the device is inserted into an aperture in a printed circuit board.

Method of making a printed circuit board copper plane repair

Printed circuit board copper plane repair

Fence panel

Growing community of inventors

Austin, TX, United States of America

Daniel Isaac Rodriguez