Media 100, Inc.

Data Translation, Inc.

Daniel F Cutter

Brian M Nowokunski

Timothy R Lightbody

A video peripheral board for providing video I/O capabilities to a general purpose host computer. The video peripheral board comprises a video I/O port configured to connect a video device, a bus interface circuit, and control logic. The bus interface circuit is configured to connect the video peripheral board into a system bus of the host computer, and is capable of becoming bus master of the system bus. The control logic is configured to control the bus interface circuit to effect transfer of video data between the video I/O port and storage of the host computer, the video data passing through the video I/O port in real time.

Peripheral circuitry for providing video I/O capabilities to a general

Video peripheral circuitry exercising bus master control over a bus of a

Apparatus for displaying a reduced-size image in a window of the display of a host computer, the reduced-size image based upon subsampled digital image data. The apparatus includes a host computer and a peripheral controller. The peripheral controller includes a subsampler that receives digital source image data and outputs subsampled image data, and window display circuit. The window display circuit receives a directive from the host computer indicating a window location on the host's display, and the subsampled image data. The window display circuit autonomously (independently of the host CPU) writes the subsampled data through the host's system bus into the display memory at addresses corresponding to the specified window. The apparatus allows video to be displayed on the display screen while avoiding intensive involvement or supervision by the host CPU during display of the video image data.

Displaying a subsampled video image on a computer display

A video peripheral board for providing video I/O capabilities to a general purpose host computer. The video peripheral board comprises a video I/O port configured to connect a video device, a bus interface circuit, and a processor. The bus interface circuit is configured to connect the video peripheral board into a system bus of the host computer, and is capable of becoming bus master of the system bus. The bus interface circuit includes a bus master address generator, a data buffer and bus control logic that provides and receives bus control signals to and from the system bus to effect read and write operations over the system bus independent of the central processing unit of the host computer. The processor controls the bus interface circuit and the video I/O port to effect transfer of video data between the video I/O port and storage of the host computer, the video data passing through the video I/O port in real time.

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Boxboro, MA, United States of America

Daniel F Cutter